ASE Technology raised its 2026 capital expenditure target to $8.5 billion, up from $7 billion in February, as AI chip packaging demand continues to outpace supply. The company expects its advanced pac…
At TSMC's European Technology Symposium, Kevin Zhang, TSMC's senior vice president, stated that wafer-level packaging technologies like CoWoS currently offer superior interconnection density for the l…
TSMC Deputy Co-COO Kevin Zhang stated the company is not concerned about Intel's packaging technology competition during TSMC's North America Technology Symposium on April 22, 2026. Zhang acknowledged…
Intel Foundry’s facility in Rio Rancho, New Mexico, is advancing toward becoming the world’s first factory to achieve mass production of glass substrates, a next-generation chip packaging technology c…
MediaTek has integrated Intel's EMIB chip packaging technology alongside TSMC's CoWoS and SoIC services for its AI chip designs, making it one of the few semiconductor designers to dual-source advance…
Memory's share of AI chip component costs rose from 52% to 63% between Q1 2024 and Q4 2025, according to an analysis of Nvidia, AMD, Google, and Amazon chips. Total component spending on AI chips grew…