Is EDA Dead?
Synopsys struck a revenue-sharing deal with OpenAI to co-develop GPT-Synopsys, an AI model trained and tuned for chip design tasks, Synopsys said at its Investor Day in New York City, as reported by R…
Synopsys struck a revenue-sharing deal with OpenAI to co-develop GPT-Synopsys, an AI model trained and tuned for chip design tasks, Synopsys said at its Investor Day in New York City, as reported by R…
Synopsys announced GPT-Synopsys at its 2026 Investor Day in New York, a specialized AI model built with OpenAI's frontier models that operates directly inside Synopsys EDA tools for chip design and ve…
Synopsys launched GPT-Synopsys, a specialist chip-design AI model built with OpenAI, during its Investor Day on Wednesday as part of a revenue-sharing agreement. Synopsys CEO Sassine Ghazi said the mo…
OpenAI and chip design software maker Synopsys announced a multi-year partnership on Wednesday to build GPT-Synopsys, a specialized model trained to operate Synopsys's electronic design automation too…
Synopsys certified its digital and analog EDA flows on TSMC's A14 process and completed 64G UCIe IP tape-outs on TSMC's 2nm and 3nm nodes, part of a broader joint announcement around TSMC's Open Innov…
India's Semiconductor Mission, backed by ₹76,000 crore (~$10 billion) in government incentives, is turning to agentic AI tools such as Synopsys.ai Copilot and NVIDIA infrastructure to accelerate chip …
Agentic AI accounted for roughly 28% of the 2026 Design Automation Conference (DAC) agenda, with 54 dedicated sessions and AI submissions rising from under 300 in 2023 to approximately 700, according …
Kepler Compute, a new memory startup, announced it is developing leadership memory beyond HBM and SRAM that it says can be built without dependence on EUV lithography, with sampling planned for 2026 a…
GlobalFoundries, the publicly traded semiconductor foundry, announced customer availability of its UX platform technologies for edge AI and connectivity applications, targeting a Physical AI market it…
Architect Labs, a startup founded last year, says it designed and verified a chip called Redwood in two weeks using AI, a process that typically takes a year or more and costs hundreds of millions of …
An MLIR pass can fold 0 * Inf into a quiet NaN attribute during constant folding, producing structurally valid but numerically meaningless IR that surfaces later as a distant accuracy regression in an…
Synopsys (NASDAQ:SNPS) is positioned for a potential upside surprise in its August 26, 2026 fiscal Q3 earnings report, following two consecutive beat-and-raise quarters, with Q2 non-GAAP EPS of $3.35 …
Synopsys has updated its Compute Express Link (CXL) IP portfolio with CXL 4.0 support, targeting AI infrastructure memory bottlenecks. The portfolio integrates a controller, IDE security module, silic…
Cadence Design Systems CEO Anirudh Devgan argues the company is undervalued, with shares trading around $338.61 against a GuruFocus GF Value estimate of $382.09, implying about 11.4% upside. The compa…
At DAC 2026, Nvidia's Tim Costa and Synopsys' Ravi Subramaniam highlighted agentic AI, multi-physics, and standards as key themes, with Subramaniam noting that $1.4 trillion is spent on engineering, 9…
Synopsys announced the release of its 3DIC tool at AMD's Advancing AI event, with AMD as a co-partner, according to Ravi Subramanian, a Synopsys executive. The tool addresses thermal and power challen…
Synopsys unveiled two production-ready autonomous chip design workflows under its AgentEngineer technology, powered by Microsoft's Discovery platform and being evaluated by AMD for next-generation AI …
Synopsys announced the industry's first complete Compute Express Link (CXL) 4.0 intellectual property suite, including a controller, IDE security modules, a PCIe 7.0-based physical layer, and verifica…
Procore Technologies reported Q2 FY26 revenue of $375 million, up 16% year-over-year, beating its guidance of $364 million to $366 million, and achieved its first-ever positive GAAP operating margin o…
Nvidia has integrated AI agents into its chip design workflow, breaking down tasks like floorplan analysis and timing closure for autonomous handling by domain-specific agents, a breakthrough in high-…