Semiconductor news and analysis on Web Pulse: 111 curated articles tracking the latest Semiconductor developments, tools, and research, updated continuously from vetted sources.
Google's custom-designed Tensor Processing Units (TPUs) are specialized chips built to perform the massive-scale mathematical computations required for AI models. The newest generation of TPUs delivers 121 exaflops of co…
Launch of two new TPU chips designed for the agentic era of AI. The TPU 8i is specialized for fast reasoning and execution of multi-step workflows by AI agents, while the TPU 8t is optimized for training complex models o…
The article summarizes the author's testing of three different mainboard options for the Framework 13 laptop: a low-end x86 Ryzen AI 5 340, a fast RISC-V DC-ROMA II, and the only Arm option, the MetaComputing AI PC with …
The article summarizes the development of an FPGA-based 80386 core that runs DOS and games at 75 MHz, then shifts focus to analyzing the processor's memory pipeline. It explains that while the 80386's virtual memory mana…
The article investigates the performance impact of "split locks" on x86-64 CPUs, which are atomic operations that span two cache lines and force a disruptive "bus lock." Testing on Intel's Arrow Lake and AMD's Zen 5 arch…
Rising DRAM prices have forced Raspberry Pi and other single-board computer (SBC) vendors to significantly increase costs, with the 16GB Pi 5 now priced at $299.99, making high-memory models unaffordable for most hobbyis…
This article explores the hobbyist-driven microbenchmarking of modern motherboard chipsets, acknowledging that while chipsets have become less critical for performance since CPUs integrated memory controllers and PCIe la…
The article analyzes Nvidia's GB10 processor, highlighting its integrated GPU (iGPU) based on the Blackwell architecture with 48 Streaming Multiprocessors, which is comparable to an RTX 5070 but with lower power and memo…
Arm's Cortex X925 is a high-performance CPU core designed to compete with desktop-class processors from AMD and Intel, achieving performance parity with AMD's Zen 5 and Intel's Lion Cove in Nvidia's GB10 chip. The core f…
The article discusses the 80386 processor's improved protection model, which added paging, a flat 32-bit address space, and Virtual 8086 mode to make protected mode usable after the 80286's unpopular implementation. It e…
The Intel 8087 floating-point coprocessor determined whether an instruction was intended for it by monitoring the computer's bus via its Bus Interface Unit (BIU) for specific "ESCAPE" opcodes assigned to the coprocessor.…
The article describes the author's project to build an 80386-compatible processor core in SystemVerilog using original Intel microcode, with real mode operational and over 10,000 test cases passing. It highlights that th…
The Arm Cortex A725 is a 5-wide out-of-order core designed for density-optimized performance, serving as the latest in Arm's 7-series line. It is featured in Nvidia's GB10 SoC, which pairs ten A725 cores with ten high-pe…
The Intel 80386, released in 1985, was the first 32-bit x86 processor, introducing a flat 4GB address space, virtual memory with paging, and an effective protected mode. It significantly improved arithmetic performance o…
The Intel 8086, introduced in 1978, is a 16-bit processor whose arithmetic-logic unit (ALU) performs 28 operations, including addition, subtraction, and bitwise logic. The ALU is controlled by a combination of microcode …
At CES 2026, AMD unveiled the silicon for its upcoming Venice server CPUs and MI400 series datacenter accelerators, showcasing new packaging technologies. The Venice CPU features 256 Zen 6 cores across eight CCDs and two…
In an interview at Qualcomm’s architecture day, GPU team lead Eric Demers detailed the upcoming Adreno X2 GPU, highlighting its improved performance-per-watt over the X1 generation and full support for DirectX 12.2 Ultim…
The Nvidia GB10, a collaboration with MediaTek, integrates a Blackwell GPU with 48 SMs and a powerful CPU consisting of 10 Cortex X925 and 10 Cortex A725 cores. The memory subsystem features a split L3 cache design (8 MB…
The Intel 8087 floating-point coprocessor, released in the 1980s, could accelerate floating-point calculations on IBM PCs by up to 100 times using complex algorithms implemented in microcode. The chip contains a microcod…
At the Supercomputing 2025 conference, Cornelis Networks CEO Lisa Spelman discussed the company's OmniPath architecture, a high-performance networking solution for HPC and AI workloads that was originally developed at In…