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[ARTICLE · art-11754] src=nand2mario.github.io ↗ pub= topic=semiconductor verified=true sentiment=· neutral

80386 Protection

The article discusses the 80386 processor's improved protection model, which added paging, a flat 32-bit address space, and Virtual 8086 mode to make protected mode usable after the 80286's unpopular implementation. It explains how the 386 manages its complex protection system—featuring privilege rings, segmentation, and call gates—using a limited transistor budget through techniques like a dedicated PLA, a hardware state machine for page walks, and caches.

read1 min views23 publishedFeb 24, 2026

I'm building an 80386-compatible core in SystemVerilog and blogging the process. In the previous post, we looked at how the 386 reuses one barrel shifter for all shift and rotate instructions. This time we move from real mode to protected and talk about protection. The 80286 introduced "Protected Mode" in 1982. It was not popular. The mode was difficult to use, lacked paging, and offered no way to return to real mode without a hardware reset. The 80386, arriving three years later, made protection usable -- adding paging, a flat 32-bit address space, per-page User/Supervisor control, and Virtual 8086 mode so that DOS programs could run inside a protected multitasking system. These features made possible Windows 3.0, OS/2, and early Linux. The x86 protection model is notoriously complex, with four privilege rings, segmentation, paging, call gates, task switches, and virtual 8086 mode. What's interesting from a hardware perspective is how the 386 manages this complexity on a 275,000-transistor budget. The 386 employs a variety of techniques to implement protection: a dedicated PLA for protection checking, a hardware state machine for page table walks, segment and paging caches, and microcode for everything else.

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