AI Chips news and analysis on Web Pulse: 6895 curated articles tracking the latest AI Chips developments, tools, and research, updated continuously from vetted sources.
Microsoft announced that its next-generation Azure Maia 300 AI accelerator is expected to deliver 40% more tokens per watt than leading GPU-based systems and up to seven times the rack-scale token throughput of Maia 200 …
AMD unveiled Helion, a rack-scale computing architecture for agentic AI workloads, at the Open Compute Project Global Summit, offering a CPU-only configuration with sixth-generation AMD EPYC processors and up to 32,768 c…
Marvell has upgraded its Structera CXL memory expansion controllers to CXL 3.2 and PCIe gen6, with the new X 3406 and 3506 offering six DDR4/DDR5 memory channels — 50 percent more than the prior generation — and supporti…
Marvell announced its second-generation Structera X CXL memory expanders, the Structera X 3406 and 3506, at the OCP Global Summit, moving the line to six memory channels, four-host sharing, and a PCIe 6.0 x16 host link. …
The Ultra Ethernet Consortium released Version 1.1 of its Ultra Ethernet specification, adding in-network collectives (INC) that the group says cut endpoint data transmission from 2 GB to 1 GB for a one-gigabyte reduced …
Cisco and Nvidia introduced the Ultra-Dense Small Form Factor Pluggable (USFP) optical module at the Open Compute Project Global Summit 2026, supporting 400 Gb/s-per-lane electrical signals and up to 12.8T of aggregate c…
Nvidia has launched RTX Spark, its first system-on-chip, combining a custom ARM CPU with a Blackwell GPU and up to 128 GB of RAM, aimed at local AI workloads and content creation. The chip was tested against offerings fr…
Meta unveiled its next generation of open networking infrastructure at the 2026 Open Compute Project Global Summit, including its first liquid-cooled network rack, IcePack, and a 102.4T switch platform, IceCube. Meta als…
NVIDIA unveiled open hardware designs, software tools and industry standards for next-generation AI data centers at the Open Compute Project Global Summit, including its Vera Rubin rack architecture contributed through t…
Microsoft unveiled Azure Maia 300 at the OCP Global Summit, its third-generation in-house inference accelerator and first multi-chiplet part, pairing a TSMC N2P compute die with eight HBM4 stacks for 288GB at 18TB/s insi…
Intel named its Crescent Island inference accelerator the Intel GPU D-series at the OCP Global Summit, built on the Xe3P architecture with up to 480GB of LPDDR5X, 1.5TB/s of memory bandwidth and 1.3 petaflops of FP8 comp…
Micas Networks announced three 102.4Tb/s Ethernet switches built on Broadcom Tomahawk 6 and running SONiC: the 4RU air-cooled M2-W6950-128OC-FA with 128 800G OSFP ports, the 2RU liquid-cooled M2-W6951-64HC-CP with 64 1.6…
D-Matrix announced Squadron compute clusters that scale its Corsair inference accelerators to 1,024 XPUs per data-center deployment, with founder and CEO Sid Sheth saying the clusters are shipping to priority customers. …
Microsoft said its Azure Maia 200 AI inference chip is now in production serving Microsoft Copilot and will add GitHub Copilot and Microsoft Foundry by the end of the year, while the next-generation Azure Maia 300 arrive…
US data centers consumed 192 TWh in 2024 and are projected to reach roughly 300 TWh by 2026, with AI accounting for about 75 TWh a year, according to Berkeley Lab, EPRI and IEA figures cited in an analysis of AI's electr…
NVIDIA's RTX Spark platform, shipping in the Surface Laptop Ultra with a 128 GB unified memory pool and 273 GB/s bandwidth, supports 120-billion-parameter models with a one-million-token context window, while Apple's M5 …
NVIDIA and Cisco announced plans for Ultra-Dense Small Form Factor Pluggable (USFP), an optical module format targeting 400Gb/s per lane in AI fabrics, with first planned transceivers packing 16 full-duplex lanes into an…
Marvell announced the Structera X 3406 and 3506 CXL memory expander controllers, which add six memory channels and support up to 9TB of DDR4 or 6TB of DDR5 for AI servers, with sampling expected to begin in Q1 2027. The …
AMD introduced Helion, an open rack reference design for agentic AI that comes in a CPU-only hyperscale version with up to 32,768 Zen 6 cores from 6th Gen EPYC 9006 Series processors and an enterprise version mixing EPYC…
Nvidia Corp. contributed its Vera Rubin rack and compute tray designs to the Open Compute Project at the OCP Global Summit in San Jose, giving system builders common blueprints for AI factory rack layouts, networking, po…