AI Chips news and analysis on Web Pulse: 6894 curated articles tracking the latest AI Chips developments, tools, and research, updated continuously from vetted sources.
Zesty announced Automated Fractional GPUs on October 15th, a product that automates GPU allocation decisions on top of NVIDIA's Run:ai GPU Fractioning Operator, which NVIDIA open-sourced two days earlier. The launch exte…
Nvidia submitted rack and compute tray designs for its Vera Rubin platform to the Open Compute Project through its modular MGX architecture at the OCP Global Summit in San Jose, Calif., offering server vendors a shared d…
Samsung unveiled zNAND-O, a flash design it is developing in 4-layer and 8-layer versions that connects to an MPU over the UCIe chiplet interconnect inside the same package, at its GMIF2026 keynote in Shenzhen, according…
NVIDIA has open-sourced Run:ai, its AI workload and GPU orchestration platform for Kubernetes, publishing the control plane, cluster services, installer, CLI, MCP server, documentation, shared client packages, and local …
Sipeed announced MaixStation, a local AI computer it claims beats Nvidia's DGX Spark, offering 256 dense TOPS and 273 GB/s of memory bandwidth in a 363 cm³ enclosure. Sipeed said MaixStation scales from 27B to 552B model…
DeepSeek published a January 2026 paper and GitHub repository proposing Engram, an architectural subsystem that moves an LLM's factual knowledge out of GPU memory and into a hash-based lookup table in host RAM or on an S…
A developer's analysis of Mistral Large 4 finds that the model's open weights do not translate into cheap self-hosting: with 1.05T total parameters and 52B active per token, the full expert set must stay resident in GPU …
NVIDIA shipped a new DLSS 5 AI model it says is ten times as fast as the version that launched with DLSS 5, debuting in NBA 2K27 on October 16, 2026, the same day RTX Spark laptops go on sale, according to NVIDIA's annou…
AMD unveiled Helion, an open rack blueprint for AI agent workloads, at the Open Compute Project Global Summit, claiming a 43% reduction in token costs and response times up to 3x faster for workloads shifted to local inf…
NVIDIA announced that semiconductor leaders including Applied Materials, Cadence, KLA, Lam Research, Siemens and Synopsys are adopting NVIDIA CUDA-X libraries, including the new cuPotential library for building AI agents…
Cisco and Nvidia announced the Ultra-Dense Small Form Factor Pluggable (USFP) standard at the Open Compute Project global summit, specifying up to 32 400 Gbps lanes and 12.8 Tbps of Ethernet bandwidth per pluggable — fou…
Celestica debuted the DS6005, a 64-port co-packaged optics (CPO) network switch with up to 102.4 Tb/s of switching capacity, at this week's OCP event in San Jose, California. The fully liquid-cooled switch uses Broadcom'…
Credo unveiled the ZeroFlag active light cable (ALC), an optical interconnect supporting 1.6-terabit connectivity, at this week's OCP event in San Jose, California, with shipping set to start sometime next year. Credo cl…
Cisco Systems Inc. and Nvidia Corp. announced plans for USFP (Ultra-Dense Small Form Factor Pluggable), an optical module designed to support 400 gigabits per lane, up from the 200 gigabits per lane that today's optical …
Researchers developed a loop-fission methodology that accelerates the number theoretic transform (NTT) on neural processing units, achieving 8.27x to 13.2x throughput speedups and 2.44x to 10.3x latency improvements per …
A new report on China's parallel AI stack finds that no public comparison yet exists of the total cost of the same training job on Chinese versus Nvidia hardware, despite 12 public readings that come closest. The report …
The University of Utah's new AI supercomputer Redtail, built on 264 Nvidia H200 GPUs across 33 HPE Cray XD670 nodes at a cost of $50 million over five years, placed 159th on the June 2026 Top500 list with a Linpack resul…
SK hynix researchers Won-Tae Koo and Jihun Kim presented a co-optimization approach for cell, non-cell, and page schemes in 3D FeNAND-based analog compute-in-memory (A-CiM) at the 2025 IEEE International Electron Devices…
Zero ASIC ranked first among chip companies for GitHub stars on public, non-fork chip design repositories, with 3,949 stars across roughly 10 employees — about 395 stars per employee, roughly 100 times the next company a…
Microsoft announced that its next-generation Azure Maia 300 AI accelerator is expected to deliver 40% more tokens per watt than leading GPU-based systems and up to seven times the rack-scale token throughput of Maia 200 …