AI Chips news and analysis on Web Pulse: 6895 curated articles tracking the latest AI Chips developments, tools, and research, updated continuously from vetted sources.
Asif Muhammad Iqbal, founder and CEO of Logic42, published a blueprint arguing that enterprises spending more than $50,000 per month on cloud GPU instances should repatriate steady-state AI training and inference workloa…
China's Ministry of Commerce and Ministry of Science and Technology unveiled a draft export-control list on October 16, 2026 covering 40 technologies, 23 of which are AI items including large language models, intelligent…
SemiAnalysis published the first TPUv7 FP8 results on its Agentic Inference Benchmark (AgentX), showing Google's TPUv7 delivered up to 1.67x better performance per total cost of ownership than Nvidia's GB300 NVL72 rack s…
U.S. export controls on advanced chips and chipmaking equipment imposed in October 2022 and expanded since have failed to freeze China's semiconductor industry and instead spurred it to build its own ecosystem, according…
Taiwan's Economic Affairs Minister Kung Ming-hsin confirmed Taipei plans to add AI servers and cutting-edge semiconductors to its controlled commodities list, making shipments of restricted AI hardware to any Chinese buy…
Taiwan signaled plans in June 2026 to restrict exports of advanced AI chips to all Chinese customers, widening its controls from a blacklist of named companies such as Huawei to an entire country's customer base and addi…
A cloud infrastructure team stopped recommending Nvidia's A100 as the default GPU for AI inference, arguing the 2020 Ampere-era card has been superseded for serving workloads by the L4, launched in 2023 on the Ada Lovela…
SK hynix unveiled its second-generation CMM-DDR5 CXL memory module at OCP Global Summit 2026, held December 12–15 in San Jose, California, claiming more than double the bandwidth (80GB/s) of the previous generation and a…
DuckDB Labs benchmarked a preview build of DuckDB v2.0 (1.6.0.dev379) on NVIDIA's new Vera CPU, which posted a median TPC-H composite score of 3,131,306 QphH@Size at scale factor 1,000 versus 2,120,588.82 for an Intel Xe…
The New York Times published a visualization built on Epoch AI's estimates of training compute and capability scores, showing that training compute for frontier language models has grown roughly 5x per year since 2020, a…
Databricks' AI Research team uses Databricks AI Runtime (AIR) to train models ranging from a few billion parameters to nearly a trillion, running tens of thousands of training and evaluation runs on NVIDIA H100 or B300 G…
Running the same Qwen2.5-1.5B-Instruct weights on an Apple M1 MacBook in fp16 and an NVIDIA Jetson Orin Nano Super in fp16 produced scores within half a percentage point, but the generated answers differed on 38 of 250 G…
Arm introduced its first production silicon, the Arm AGI CPU, purpose-built for agentic AI, and at the OCP Global Summit 2026 in San Jose detailed production systems, an open agentic rack architecture and independent ben…
A paper submitted to arXiv on 9 Oct 2026 presents Minions, a dynamic and distributed virtual GPU cloud that aggregates idle Apple Silicon GPUs across macOS devices to run large-scale machine learning inference workloads.…
Hedra said it cut 2K image edits with Krea 3 to 3.6 seconds on AMD Instinct MI355X accelerators, down from about 22 seconds on the same hardware, after rebuilding its inference stack with custom ROCm kernels and lower-pr…
Meta launched Muse Spark Open, an 816B-parameter mixture-of-experts coding model with 42B active parameters and a 1M token context window, trained on NVIDIA GB300 NVL72 Blackwell Ultra for agentic coding workflows. The m…
BitRun v0.2.0-beta, a zero-dependency runner and terminal dashboard for 1-bit and 1.58-bit ternary LLMs on Apple Silicon and x86_64 CPUs, was released as a Show HN project, packaging native CPU inference with live wattag…
Samsung is demonstrating a CXL memory pool validated with AMD at the OCP Global Summit in San Jose, claiming up to 38 percent lower time to first token and up to 3.3x higher goodput than static allocation for agentic AI …
Celestica introduced the DS6005 at the OCP Global Summit, a co-packaged optics data center switch delivering 102.4Tbps of non-blocking switching capacity and 64 optically enabled 1.6TbE ports in a 1.5OU fully liquid-cool…
StepFun published the weights for Step 5 Preview, a 600-billion-parameter model with 27 billion active parameters per token, on Hugging Face on October 15th, following its September 20th introduction. NVIDIA said the NVF…