Google engineers reported a 4.7x faster prefill and 3.1x faster decode for Qwen 3.5-397B-A17B on Ironwood TPUs between April and June, achieved by using data parallelism for attention layers and exper…
A developer documented their migration of a Cloud TPU workload from the deprecated Cloud TPU API to Compute Engine, moving a v6e-1 chip serving gemma-4-E2B-it under vLLM. The migration required mappin…
Google released a microbenchmark suite on GitHub to help developers evaluate TPU performance by measuring network, compute, HBM, and host transfer capabilities. The suite establishes a Speed-of-Light …
Google's TPU clusters use 2D or 3D torus topologies with 4 or 6 nearest neighbors per chip, while NVIDIA GPU clusters rely on fat-tree topologies over InfiniBand, according to a July 14, 2026 technica…