Alphabet is expanding its Tensor Processing Unit (TPU) business through a $5 billion joint venture with Blackstone to build 500 MW of TPU compute capacity by 2027, as Google Cloud revenue is projected…
OpenAI and Broadcom unveiled Jalapeno, OpenAI's first custom ASIC designed specifically for large language model inference, marking a shift from general-purpose GPUs to specialized silicon to address …
A developer recommends Unsloth as the most cost-effective method for fine-tuning small language models in 2026, citing its ease of use and low VRAM requirements compared to the theoretically cheaper b…
OpenAI unveiled Jalapeno, its in-house LLM inference accelerator chip developed with Broadcom, achieving tape-out in nine months. The chip is designed to accelerate inferencing for OpenAI's LLM stack …
Google's TPU uses a systolic array architecture optimized for tensor algebra, offering higher throughput and energy efficiency than GPUs for dense matrix operations, but requires XLA compilation and i…
Google's Tensor Processing Units (TPUs) are specialized chips designed for neural network matrix multiplications, differing fundamentally from GPUs. Unlike GPUs, which evolved from graphics rendering,…
Google Cloud launched the TPU Developer Hub, a centralized educational resource providing technical guidance on TPU hardware, software stack, and optimization strategies for AI developers. The hub off…
Seeking Alpha assigned Alphabet Inc. a Buy rating, citing the company's proprietary TPU chip stack that reduces dependence on NVIDIA and strengthens its infrastructure moat. The analysis reported Goog…
NVIDIA GPUs handle variable-length inference requests dynamically without recompilation, while TPUs and AWS Trainium require fixed shapes compiled ahead of time, causing crashes or stalls on mismatche…
Tensors enable hardware acceleration by leveraging GPUs and TPUs to perform parallel mathematical operations efficiently, making them essential for training neural networks. They also support automati…
Google hosted a Kaggle hackathon challenging developers to train non-reasoning Gemma-2-2B and Gemma-3-1B models into general reasoning models using Tunix and Kaggle TPUs. Over 11,000 entrants and 300+…
Nvidia's Hopper and Blackwell GPU architectures introduced spatial scheduling through warp specialization, requiring developers to divide pipeline work between different warp groups for data movement …
Reiner Pope, CEO of AI chip startup MatX and former Google engineer, delivered a blackboard lecture explaining chip design from basic logic gates to the architectures of GPUs, TPUs, FPGAs, and the hum…
MaxText has introduced new post-training capabilities, specifically Supervised Fine-Tuning (SFT) and Reinforcement Learning (RL), now available on single-host TPU configurations like v5p-8 and v6e-8. …
According to a May 2026 report from Tom's Hardware, the custom AI ASIC market is being driven by major deals from Broadcom and the continued development of in-house chips like Google's TPUs and Meta's…
The Google Tensor ML SDK has moved from an Experimental Access Program to Beta, now integrating with LiteRT to provide a unified API for deploying machine learning models on the Tensor Processing Unit…
Cerebras Systems has secured a 750MW compute deal with OpenAI, positioning the company for its upcoming IPO as demand for fast token generation surges. The wafer-scale chip maker's speed advantages, p…
Traditional cloud reliability models, which focus on individual instances, are inadequate for trillion-parameter AI models, necessitating a shift to cluster-level reliability. Google presents its clus…
Amazon Web Services is preparing to sell its Trainium AI chips as complete rack systems for customers to own and operate in their own data centers, following Google's move to sell TPU racks to Anthrop…
Google's custom-designed Tensor Processing Units (TPUs) are specialized chips built to perform the massive-scale mathematical computations required for AI models. The newest generation of TPUs deliver…