XCENA and Samsung have developed the MX1, a CXL memory expansion device that hosts up to 2 TB of DDR5 memory, supports SSD storage, and includes 3,072 RISC-V cores for data-parallel compute, targeting…
Intel's upcoming Datacenter GPU, codenamed Crescent Island, features a 480 GB LPDDR5X memory subsystem, the highest capacity of any GPU or AI accelerator, enabling it to run Deepseek-V4 Flash entirely…
Nvidia is extending CUDA support to RISC-V CPUs, requiring server-grade features such as RVA23 compliance, ACPI, PCIe coherency, and peer-to-peer PCIe, according to a Hot Chips 2026 talk. The company …
At Hot Chips 2026, Anurag Agarwal and Radhakrishna Giduthuri presented simulations and projections for High Bandwidth Flash (HBF), a new memory technology that combines SSD-like flash storage with HBM…
Synopsys announced the release of its 3DIC tool at AMD's Advancing AI event, with AMD as a co-partner, according to Ravi Subramanian, a Synopsys executive. The tool addresses thermal and power challen…
NVIDIA's 45-page whitepaper on its Vera server CPU, built around the 88-core Olympus Arm v9.2 core, contains misleading marketing claims that undermine its strong hardware, according to an analysis. T…
AMD Corporate Fellow and Chief Architect for Datacenter GPUs Alan Smith revealed at the Advancing AI 2026 event that the new CDNA5 architecture, powering the MI455 and Helios, has been rebased from th…
AMD announced the Instinct MI455X, its first GPU designed for rack-scale AI deployments, based on the new CDNA5 architecture and featuring 256 Work Group Processors, 432 GB of HBM4 memory at 23.3 TB/s…
AMD's upcoming MI400-series MI455X accelerator, codenamed GFX1250 and targeting machine learning, will operate exclusively in Wave32 mode and support WMMA instructions, according to LLVM commits analy…
The x86 Ecosystem Advisory Group has released a whitepaper and specification for ACE (AI Compute Extensions), a new accelerator type for Intel's AMX instruction set that introduces outer product instr…
SPEC has released SPEC CPU2026, an updated version of its industry-standard CPU benchmark suite, which now includes 52 workloads (up from 43 in SPEC CPU2017) with larger code sizes. The new suite uses…
Based on the article, Geekbench 6 is a consumer-focused benchmark suite distributed in binary form that heavily utilizes modern CPU instruction set extensions like AVX-512 and AMX, particularly in wor…
The article investigates the performance impact of "split locks" on x86-64 CPUs, which are atomic operations that span two cache lines and force a disruptive "bus lock." Testing on Intel's Arrow Lake …
The article announces the adoption of Claude's C Compiler (CCC), an AI-generated compiler developed by Anthropic using their Claude LLM, as a demonstration of embracing AI-driven software development.…
This article explores the hobbyist-driven microbenchmarking of modern motherboard chipsets, acknowledging that while chipsets have become less critical for performance since CPUs integrated memory con…
The article analyzes Nvidia's GB10 processor, highlighting its integrated GPU (iGPU) based on the Blackwell architecture with 48 Streaming Multiprocessors, which is comparable to an RTX 5070 but with …
Arm's Cortex X925 is a high-performance CPU core designed to compete with desktop-class processors from AMD and Intel, achieving performance parity with AMD's Zen 5 and Intel's Lion Cove in Nvidia's G…
The Arm Cortex A725 is a 5-wide out-of-order core designed for density-optimized performance, serving as the latest in Arm's 7-series line. It is featured in Nvidia's GB10 SoC, which pairs ten A725 co…
At CES 2026, AMD unveiled the silicon for its upcoming Venice server CPUs and MI400 series datacenter accelerators, showcasing new packaging technologies. The Venice CPU features 256 Zen 6 cores acros…
In an interview at Qualcomm’s architecture day, GPU team lead Eric Demers detailed the upcoming Adreno X2 GPU, highlighting its improved performance-per-watt over the X1 generation and full support fo…