Most DPUs tend to follow the same recipe. Take a fixed-function NIC, fold in a cluster of Arm cores for whatever the pipeline can’t handle, and bake until your traffic never touches the slow path. Xsight Labs decided to have their own take on that recipe with the E1, which it bills as the first shipping 800G DPU.
Instead of hiding a CPU behind an offload engine, Xsight put up to 64 Arm Neoverse N2 cores directly in the data path and lets standard Linux do the cooking. For AI data centers already straining against power budgets and constant protocol churn, that recipe deserves a taste test.
The Slow Path Problem
Traditional DPUs are fast right up until they aren’t. The fixed pipeline handles the common case at line rate, but anything unusual gets punted to an exception processor on the other side of an internal bus. In practice, the more creative your networking gets, the worse your performance looks. A new tunnel format or a telemetry tweak can shove traffic into the slow lane without warning.
The E1 skips that handoff. Built on TSMC’s 5nm process with dual 400G Ethernet ports, it processes packets on the same cores that run your software. There’s no bouncing between an offload engine and a separate CPU cluster, so there’s no internal bandwidth choke point between them. Xsight says it can sustain 800 Gbps forwarding with as few as eight cores per 400G pipe using DPDK. That leaves plenty of headroom for services.
Where It Fits in the AI Data Center
AI infrastructure puts pressure on the server edge in ways general-purpose cloud never did. GPUs are expensive, and every cycle a host CPU spends shuffling packets or encrypting traffic is a cycle it isn’t feeding the monster. The E1 sits between the host and the network and takes over SDN, security, and telemetry. It runs SONiC DASH for stateful policy at line rate, which matters when you’re carving GPU clusters up for multiple tenants.
Storage is the other half of the story. Xsight’s open source ESDK includes a software-defined RoCE v2 implementation for moving data between GPUs and storage without pulling the host CPU into it. Doing RDMA in software instead of hardware will raise some eyebrows, and network engineers should ask hard questions about tail latency under load. The upside is flexibility. When the industry tweaks congestion control again, which they inevitably will, you update code instead of waiting for a new chip.
The PCIe side is just as flexible. Forty lanes of Gen 5 PCIe deliver roughly 1 Tbps of bandwidth through a dual-mode controller. The E1 can act as a host for drives and accelerators, or it can present itself to a server as a NIC or NVMe controller. Xsight says a single E1 can drive eight NVMe SSDs at 800 Gbps, which makes it a credible brain for the JBOF arrays and KV cache appliances that keep inference pipelines fed.
Buffers, Bursts, and Power
AI traffic is bursty. When hundreds of GPUs finish a collective operation at the same moment, the resulting data load can flatten undersized buffers. The E1 carries up to 32 MB of system cache shared between compute and I/O, so packets get absorbed and processed without a round trip to DRAM. That helps with head-of-line blocking. It also saves power, since DRAM access is one of the more expensive things a chip does.
Power is where Xsight makes its boldest claims. The company quotes 2.6 times more memory bandwidth per watt and 1.6 times more integer compute per watt than competing Arm DPUs. Fewer pipeline stages and fewer trips across internal buses should mean fewer wasted watts.
Software You Already Know
The part that likely matters most to operators is the software model. The E1 boots unpatched Ubuntu or Debian, and ESDK is open source. Your team doesn’t need a proprietary toolchain or a vendor engineer on speed dial to change how the data plane behaves. The same binaries also run on the smaller E1L, which scales down to 200G for edge and storage deployments.
Xsight also pairs the E1 with its X2 switch, a 12.8T system that draws under 200 watts. In that smart switch design, the X2 handles Layer 2 and Layer 3 forwarding while the DPUs take on stateful Layer 4 through 7 work in the same box. Policy gets enforced before traffic ever reaches a host.
Bringing IT All Together
Xsight is betting that AI networks will keep changing faster than fixed silicon can follow. I think that’s the right bet. Every year brings a new transport tweak, a new encryption requirement, or a new way to slice up GPU clusters, and hardware that can only do what it shipped with ages poorly.
The open questions are ecosystem and scale. Hyperscalers already have deep DPU commitments elsewhere, and Xsight needs production design wins to prove its efficiency numbers aren’t just lab results. Still, an 800G DPU that runs plain Linux directly on the data path addresses a pain point. If the power claims hold up, the E1 could finally make programmability something operators stop paying a penalty for.
To learn more about Xsight Labs and their new E1 DPU, make sure you check out their website at https://XsightLabs.com. To see their entire presentation from Networking Field Day, make sure to head over to their presentation appearance page