Photo: Kgw5360 / Wikimedia Commons / CC BY-SA 4.0 (https://creativecommons.org/licenses/by-sa/4.0) The stacked NAND technology closes to within 2.2% of HBM bandwidth in simulations, potentially reshaping the economics of AI inference hardware.
For years, the AI hardware race has centered on one bottleneck: memory. Specifically, how fast you can feed data to GPUs that are increasingly starving for it. SanDisk, operating under the Western Digital umbrella, thinks the answer isn’t just faster DRAM. It’s flash memory that behaves like DRAM. The company’s High Bandwidth Flash technology delivered 12.8 TB/s of memory bandwidth with 4 TB of capacity per GPU in simulation, a combination that would allow complex AI models to run on as few as one to four GPUs instead of entire racks of hardware. If those numbers hold up in production silicon, HBF could fundamentally change how companies deploy AI inference at scale.
What HBF actually does #
High Bandwidth Memory, or HBM, is the current gold standard for feeding data-hungry AI accelerators. It’s fast, it sits close to the processor, and it’s expensive. The problem is capacity. Even the latest HBM stacks max out at relatively modest capacities, which means running large language models like Meta’s Llama 3.1 405B requires distributing the workload across many GPUs.
SanDisk’s HBF takes a different approach. Instead of stacking DRAM dies, it stacks NAND flash, the same type of memory in your phone and SSD, but engineered to deliver bandwidth that competes with HBM. Each GPU gets eight 512 GB stacks, totaling 4 TB of on-package memory. That’s 8 to 16 times the capacity of HBM at comparable cost, power consumption, and physical footprint.
The simulation results are striking. When running pretrained weights from the Llama 3.1 405B model, HBF’s read performance landed within 2.2% of an unlimited-capacity HBM configuration. For inference workloads, where the GPU is mostly reading model weights rather than writing new data, that gap is essentially negligible.
HBF isn’t trying to replace HBM for training, where write speeds and latency matter enormously. NAND flash has inherent latency characteristics that make it unsuitable for that role. But inference, the part where a trained model actually answers questions and generates images, is overwhelmingly read-heavy. SanDisk designed HBF to exploit exactly that asymmetry.
The engineering underneath #
Getting flash memory to perform at HBM-like speeds required some creative engineering. SanDisk built HBF using its proprietary CMOS Directly Bonded to Array technology, which fuses the logic layer directly onto the NAND array. This eliminates the usual bottleneck of routing signals through wire bonds or interposers.
The stacking itself uses a 16-high configuration with low-warpage technology. SanDisk’s approach is designed to match the physical stack height of upcoming HBM4 modules, meaning HBF could slot into hardware designs already being built around HBM4 specifications.
Industry momentum and timeline #
SanDisk isn’t building this in isolation. The company signed a memorandum of understanding with SK hynix, one of the world’s largest memory manufacturers, to begin standardization work under the Open Compute Project. That collaboration kicked off in February 2026, with the initial technical specification targeted for release in August 2026.
SanDisk has also assembled a technical advisory board that includes David Patterson, the Turing Award-winning computer scientist who co-invented RISC architecture, and Raja Koduri, the former Intel and AMD graphics chief.
The technology earned an industry award, and SanDisk plans to begin sampling HBF in the second half of 2026. Early applications in AI inference hardware are anticipated by 2027.
For the semiconductor industry, HBF introduces a new variable into capacity planning for AI infrastructure. Today, running a model like Llama 3.1 405B requires distributing its roughly 960 GB of weights across many GPUs, each with limited HBM capacity. SanDisk’s simulation showed that same workload fitting comfortably on one to four HBF-equipped GPUs. Disclosure: This article was edited by Editorial Team. For more information on how we create and review content, see our