Samsung Electronics introduced zHBM and zNAND-O 3D-memory concepts and a more-than-400-layer V10 BV-NAND prototype on August 4 at FMS 2026 in Santa Clara. Samsung says a next-generation zHBM interface could deliver about eight times HBM5 performance, while V10 BV-NAND raises memory density by approximately 58% over V9.
Samsung Electronics introduced 3D-memory concepts, a more-than-400-layer V10 Bonding V-NAND prototype, and a broader AI-memory roadmap at the Future of Memory and Storage conference in Santa Clara, California. The FMS 2026 event runs from August 4 through August 6.
The company displayed concept models of zHBM and zNAND-O, alongside V10 BV-NAND, HBM4E, HBM5, LPDDR5X-PIM, and enterprise SSD platforms including PM1763 and BM1773. Samsung said its AI cloud server-themed booth includes about 30 memory and storage technologies.
zHBM moves memory above the accelerator #
Samsung presented zHBM as a future architecture that vertically stacks high-bandwidth memory above an AI accelerator, rather than placing HBM packages alongside the processor. Samsung said shortening the distance between memory and the accelerator is intended to raise bandwidth and power efficiency for large-scale AI training and inference.
According to Samsung, a next-generation interface system using zHBM could provide about eight times the performance of HBM5, more than 10 times its memory density, three times greater energy efficiency, and more than a 50% reduction in thermal resistance. These are company projections for a concept architecture, not product benchmark results from deployed systems.
Samsung also described an interlayer between the memory stack and accelerator that could accommodate custom intellectual property. The company said this could support configurations tailored to memory capacity or accelerator functionality.
For infrastructure teams, the distinction between a package-level concept and a shipping memory standard is material. Advanced packaging can alter bandwidth, thermal, manufacturing-yield, and software-platform constraints simultaneously, so the projected gains require validation in complete accelerator systems rather than memory-only demonstrations.
NAND roadmap emphasizes density and packaging
Samsung's V10 BV-NAND prototype uses a wafer-bonding architecture and has more than 400 layers. Samsung says the technology increases memory density by approximately 58% over V9 NAND while improving read, write, and input/output performance.
BV stands for Bonding Vertical. Samsung describes the approach as separately manufacturing the cell and circuit portions before vertically bonding them. The public announcement does not provide independent performance measurements, endurance data, production yields, or a commercialization date for the V10 prototype.
The zNAND-O concept extends the 3D approach to NAND. Samsung showed four-layer and eight-layer configurations intended for edge AI workloads and described the concept as combining V-NAND with through-silicon-via packaging to improve space efficiency, I/O performance, and response time.
NAND capacity has become more relevant to AI infrastructure as workloads extend beyond model training to inference, retrieval pipelines, checkpoints, datasets, and multimodal content. Denser flash and closer memory-accelerator integration can reduce data-movement bottlenecks, but they also increase the importance of endurance, thermal behavior, controller software, and total system cost testing.
Roadmap remains largely pre-product
Samsung's presentation included HBM4E, HBM5, LPDDR5X-PIM, and PM1763 enterprise storage in addition to the new concepts. The company framed the portfolio around high-performance computing and AI infrastructure requirements.
The most consequential FMS items are still concept models or prototypes. Samsung did not provide public commercialization dates, pricing, supported accelerator partners, or independently verified performance data in the materials reviewed. For ML platform architects, those details, along with packaging compatibility and measured bandwidth per watt under production workloads, will determine whether the concepts translate into deployable AI infrastructure.
Key Points #
- 1Samsung's zHBM concept places HBM above accelerators, and Samsung projects about eight times HBM5 performance through shorter data paths.
- 2V10 BV-NAND exceeds 400 layers and, Samsung says, raises density about 58% over V9, addressing storage capacity for AI workloads.
- 3The announcement is a roadmap and prototype presentation, so system benchmarks, availability, compatibility, thermal behavior and manufacturing yields remain open questions.
Scoring Rationale #
Samsung's roadmap addresses memory bandwidth, density, and power constraints that materially affect AI training and inference infrastructure. However, zHBM and zNAND-O remain concepts, while V10 BV-NAND is a prototype, limiting immediate deployment impact.
Sources #
Primary source and supporting public references used for this report.
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