OpenAI, Microsoft, Broadcom, AMD and Nvidia developed a new network protocol called Multipath Reliable Connection (MRC) that scales Ethernet to over 1 million endpoints for AI clusters by increasing t…
Modular CEO and Google AI infrastructure veteran Chris Lattner launched Inkwell, a real-time illustrated storybook app built on the company's Modular Cloud inference platform, demonstrating sub-second…
In a podcast episode at HumanX, AMD CTO Mark Papermaster explained that the company's AI success stems from a decade-long focus on customer-driven innovation and a unique ability to integrate CPUs and…
AMD CEO Lisa Su announced on a Thursday conference call that the company now projects the total addressable market for data center CPUs will reach $120 billion by 2030, doubling its November 2025 fore…
Modular hosted an AMD AI DevDay event and opened new offices, while its community continued to ship new projects and contributions. The company's latest Modverse update highlights ongoing collaboratio…
Intel and AMD are jointly developing Advanced Performance Extensions (APX), a major expansion of the x86 instruction set that doubles the number of general-purpose registers from 16 to 32 and adds con…
Intel's data center CPU sales surged as AI inference demand shifted system designs from 8-to-1 GPU-to-CPU ratios to 4-to-1 or even 2-to-1 configurations, increasing CPU content per AI system. Intel CF…
AMD and Intel, through the x86 Ecosystem Advisory Group, are standardizing new matrix math instructions called ACE (AI Computation Extensions) to accelerate AI workloads on x86 processors. ACE introdu…
The article investigates the performance impact of "split locks" on x86-64 CPUs, which are atomic operations that span two cache lines and force a disruptive "bus lock." Testing on Intel's Arrow Lake …
This article explores the hobbyist-driven microbenchmarking of modern motherboard chipsets, acknowledging that while chipsets have become less critical for performance since CPUs integrated memory con…
The article analyzes Nvidia's GB10 processor, highlighting its integrated GPU (iGPU) based on the Blackwell architecture with 48 Streaming Multiprocessors, which is comparable to an RTX 5070 but with …
Arm's Cortex X925 is a high-performance CPU core designed to compete with desktop-class processors from AMD and Intel, achieving performance parity with AMD's Zen 5 and Intel's Lion Cove in Nvidia's G…
At CES 2026, AMD unveiled the silicon for its upcoming Venice server CPUs and MI400 series datacenter accelerators, showcasing new packaging technologies. The Venice CPU features 256 Zen 6 cores acros…
At Supercomputing 2025, EuroHPC, AMD, and Eviden announced the Alice Recoque supercomputer, which will use AMD's upcoming Instinct MI430X GPUs to achieve over 1 Exaflop/s of sustained HPL performance …
This article evaluates the performance impact of NPS0 (Uniform Memory Access) mode on a dual-socket AMD EPYC 9575F system, provided by Verda (formerly DataCrunch). The analysis reveals that while NPS0…
This article is a beginner-friendly guide to diagnosing and fixing AMD GPU issues on Linux, particularly for RDNA3 (RX 7000 series) cards. It explains common symptoms like system freezes and "fence ti…
AMD's Strix Halo mobile processor uses a 32 MB Infinity Cache as a GPU last-level cache to balance high bandwidth demands with power efficiency, supported by a 2 MB L2 cache and 256 KB L1 per shader a…
The article evaluates the Infinity Cache in AMD's Strix Halo mobile chip (Ryzen AI MAX series), which combines a 16-core Zen 5 CPU with a 20-WGP RDNA 3.5 GPU and 32 MB of memory-side cache. The author…
AMD's Strix Halo is a high-performance chiplet APU announced at CES 2025, designed for mobile devices with a TDP range of 55W to 120W. It features up to 16 Zen 5 CPU cores, a 40-core RDNA 3.5 iGPU, an…
This article describes the porting of AMD's FidelityFX Super Resolution (FSR) v1.0.2 upscaling technology to the mpv video player as a GLSL shader. The implementation operates directly on the LUMA pla…