OpenAI / Wikimedia Commons (Public domain)
OpenAI's coding agent is moving from software into chip design and verification, with partners reporting large time savings
OpenAI’s AI tools have spent most of their public life writing code, drafting emails and explaining spreadsheets. Now the company wants credit for something heavier: hardware.
In a post on X, OpenAI said ChatGPT and Codex help engineers design and test hardware.
From a million lines of code to chip verification #
The research behind the update starts with software, where Codex has had the most practice. OpenAI’s internal team reportedly used Codex agents to ship a software beta containing approximately 1 million lines of code.
That beta included over 1,500 merged pull requests.
The code in that beta was created solely by Codex agents, according to the findings. The estimated result was a 10x reduction in time compared to writing it by hand.
Outside partners are reporting similar multiples. NVIDIA reported a 10x speedup in end-to-end machine learning workflows using Codex powered by GPT-5.5.
The more interesting numbers come from chipmaking. A large semiconductor client saw roughly 48% time savings in directed test generation, a step in chip verification.
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Verification is the process of checking that a chip design actually does what it is supposed to do before anyone manufactures it. Directed test generation means writing specific test scenarios aimed at particular behaviors in the design. Verification typically takes about 70% of project effort, according to the findings.
The Jalapeño chip as a proof of concept #
The company’s “Jalapeño” AI inference chip was developed to tape-out in just nine months, with help from Codex and Broadcom. Tape-out is the moment a chip design is finalized and handed off for manufacturing.
An inference chip is built to run AI models that have already been trained, as opposed to training them from scratch.
How Codex got here #
Codex has been updated repeatedly through 2026, folding in successive iterations of OpenAI’s GPT models. Those updates have added longer autonomous sessions.
The updates have also introduced specialized workflows through partnerships. Synopsys is one of them, and that relationship has reportedly expanded what Codex can do in chip design. The broader shift is toward Codex working inside specialized hardware design environments, rather than living only in a general-purpose code editor.
What this means for engineering teams #
The most consequential figure here may be the verification number, not the headline-friendly 10x multiples. If verification eats about 70% of project effort, it is the bottleneck that determines how fast a chip gets to market.
That said, the roughly 48% savings applies to directed test generation specifically, which is one slice of verification.
There is also a credibility question worth keeping in view. Many of these numbers come from OpenAI itself, from partners with commercial ties, or from a semiconductor client that is not named in the findings.
OpenAI also occupies an unusual dual role. It builds the AI tool, and it is using that tool to design its own chip.
Disclosure: This article was edited by Diego Almada Lopez. For more information on how we create and review content, see our Editorial Policy.