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Huawei’s new Kirin chip puts LogicFolding to the test, with bigger ambitions in AI

Huawei Technologies launched the Kirin 9050 Pro, the first commercial chip using its LogicFolding architecture, which stacks circuits to boost performance without advanced lithography, delivering a 42% performance leap in the Mate XT 2 smartphone. Analysts say the chip is a high-stakes test of Huawei's ability to bypass US sanctions, though the approach may be less economical for chipmakers with access to leading-edge equipment.

read2 min views1 publishedSep 8, 2026
Huawei’s new Kirin chip puts LogicFolding to the test, with bigger ambitions in AI
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New smartphone processor is a crucial test of the firm’s attempt to route around US-led curbs on the best chipmaking technology Huawei Technologies’ latest flagship mobile processor is serving as a high-stakes test of whether the company can bypass US technology sanctions by layering circuits on top of each other to boost performance, according to analysts.

launched the Kirin 9050 Pro, the first commercial chip employing its

LogicFolding architecture. The new strategy aims to squeeze greater computing power out of semiconductor designs without relying solely on the circuit-shrinking provided by the world’s most advanced lithography equipment, which remains blocked by US export controls.

Powering Huawei’s new Mate XT 2 trifold smartphone, the Kirin 9050 Pro delivers a 42 per cent leap in overall performance over its predecessor alongside improved power efficiency, according to the company.

For global chipmakers with access to leading-edge manufacturing equipment, stacking components – or 3D integration – is typically a supplementary tool used alongside transistor miniaturisation. Constrained by trade restrictions, however, Huawei has instead made advanced packaging and architectural workarounds its main strategy.

While existing 3D techniques simply stack largely self-contained dies, Huawei’s LogicFolding splits core computing functions across two active layers designed to operate as a single unit.

“LogicFolding is first and foremost a compensatory route – a choice born of external constraints,” said Leslie Wu, CEO of semiconductor consultancy RHCC, in a research note.

Wu said the approach came at a cost. Bonding two active silicon layers requires complex manufacturing steps – including precise wafer thinning and microscopic vertical wiring – that can weigh on factory yields. For global companies that can simply print smaller transistors on a single layer, the economics of LogicFolding may be less compelling.

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