Chipmakers gathered at Hot Chips 2026 to show off 3D DRAM designs meant to fix the memory bottleneck now driving up Nvidia's AI server prices. A startup called d-Matrix arrived with actual silicon, not just a roadmap.
At Hot Chips 2026, the Silicon Valley conference where hardware makers unveil their newest chips, d-Matrix presented Raptor: what it calls the first 3D-DRAM accelerator built specifically for generative AI inference. The claims are big. The company says Raptor delivers up to 10 times the memory bandwidth of chips running on HBM4, the fastest memory standard shipping today, and 10 times the energy efficiency, according to details reported by ServeTheHome. Each Raptor card carries 32GB of memory. It's built by stacking a TSMC N4 logic die directly onto a 3D DRAM die, using 36-micrometer face-to-face bonding - a design d-Matrix developed with manufacturing partner Alchip.
The timing is not an accident. Nvidia has told its largest server customers it will raise prices on systems built on the Vera Rubin and Grace Blackwell platforms by more than 15% for units shipping early next year, Bloomberg reported. Samsung and SK Hynix had already pushed 2026 HBM3E supply prices up close to 20% before the year began, and conventional DRAM contract prices climbed as much as 63% quarter over quarter in the second quarter alone. Deloitte does not expect meaningful new memory capacity until 2029 or 2030. Gartner projects the supply crunch lasting through at least the first half of 2027. Hot Chips landed right in the middle of that squeeze, with the industry's engineers explaining, on stage, exactly why memory became the bottleneck in the first place.
Micron's HBM Design Architecture Fellow, Raghu Sreeramaneni, laid out the math during his own Hot Chips 2026 talk. Compute performance scales roughly 3 times every two years. HBM bandwidth scales at about half that rate. The gap compounds every generation. Micron also pointed out just how much of a modern AI chip package is now memory, not logic. In a typical GPU system-in-package built around four 12-high HBM stacks, memory silicon accounts for roughly 90% of the total silicon area - eight times more than the GPU logic itself. That's the physical shape of the memory wall. You can add more compute cores easily. You cannot add bandwidth nearly as fast.
Samsung and SK Hynix used their Hot Chips slots to describe incremental fixes rather than a clean break from HBM. Samsung showed off a Heat Path Block: a thermal structure built into its HBM5 base die that pulls heat away from the core die through dedicated pillars to a copper heat spreader. It cuts peak temperatures by more than 35%. That base die will move to Samsung's in-house 2nm process, down from the 4nm node used for HBM4 and HBM4E. Mass production is not expected until around 2028. SK Hynix, for its part, detailed advanced packaging work using Intel's EMIB technology and a logic base die with more through-silicon vias, targeting HBM4 bandwidth up to 2,048 GB/s. Both are real engineering gains. Neither changes the fundamental structure of memory sitting beside compute rather than inside it.
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A startup versus the incumbents #
That's the real split exposed at this year's conference. Samsung and SK Hynix are refining a packaging architecture that has already been squeezed for most of its easy gains. d-Matrix wants to go further: fuse the DRAM underneath the compute itself, and eliminate the physical PHY interface that limits how fast HBM can talk to a processor. That's the pitch, anyway. d-Matrix says a 72-card Raptor cluster can host a frontier model like Kimi K3 at a full 1 million token context window - the kind of workload that currently demands racks of HBM-heavy GPUs.
None of this ships at volume tomorrow. True 3D DRAM, where memory and logic are stacked and bonded rather than connected through an interposer, still faces steep manufacturing hurdles. Lam Research has compared the transition to the years-long shift from planar to 3D NAND flash. That took the better part of a decade to get right. Even so, d-Matrix has working silicon and a named manufacturing partner in Alchip, which puts it ahead of most rivals making similar claims. But Samsung and SK Hynix control the vast majority of HBM supply Nvidia depends on today. Neither is walking away from that position while a startup's architecture is still proving itself in early silicon.
For investors watching memory and AI infrastructure stocks, the practical read is this: the shortage squeezing Nvidia's margins right now has no fix arriving before 2028 at the earliest. And the company most likely to disrupt that timeline isn't one of the two incumbents currently setting HBM prices. It's the startup with the actual silicon. Also read: Michael Burry Dumps Alibaba For JD.com Right As It Seeks $10.2 Billion • A Rogue Anthropic AI Agent Faked Identities to Hack a Real GitHub Project • A Twitch Streamer Is Suing Amazon Over Years of Secret AI Training