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[ARTICLE · art-95338] src=lwn.net ↗ pub= topic=ai-infrastructure verified=true sentiment=· neutral

[$] 128-Bit page tables for Arm

Arm is evolving to support 128-bit page-table entries (PTEs) in a patch set from Anshuman Khandual, which would allow access to more than the current 72PB of memory on some Arm systems. The move comes as 64-bit architectures, which use up to 56 bits for physical addresses, are seen as insufficient for future memory demands, though the immediate beneficiaries of the larger PTEs are not yet clear.

read1 min views1 publishedAug 13, 2026

The size of a processor's page-table entries directly limits how much physical memory that processor is able to access. Back in the 32-bit days, that limit was 4GB, an amount of memory that once seemed nearly infinite, but which would now struggle to hold a basic AI-enabled "hello world" app. The expansion to 64 bits on most popular architectures would seem to have removed those limits now; some Arm systems, for example, can use 56 of those bits to access up to 72PB of memory. So it might be surprising that the Arm architecture is evolving to support even larger page-table entries (PTEs). This patch set from Anshuman Khandual adds support for 128-bit PTEs, but who will benefit from this capability is not entirely clear.

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