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bitwise XOR swizzle

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07:00
2026-09-20
leimao.github.io
ai-infrastructure

CUDA Thread Block Swizzle

A technical blog post analyzes how CUDA thread block swizzle algorithms change L2 cache residency and GEMM kernel performance by remapping program IDs to tile locations. The post compares four swizzle…

// co-occurs with top 5 entities
CUDA 1 GEMM 1 L2 cache 1 Morton/Z-order swizzle 1 grouped 2D panel swizzle 1
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ai infrastructure 1 machine learning 1 developer tools 1