A custom self-attention in-memory computing architecture built on charge-based gain cells reduces attention latency by up to two orders of magnitude and energy consumption by up to four orders of magn…
A technical handbook on FlashAttention explains that the algorithm achieves wall-clock speedups by reducing data movement between GPU high-bandwidth memory (HBM) and on-chip SRAM rather than by approx…
Researchers submitted a paper to arXiv on 24 Feb 2026 introducing OpenGCRAM, a memory compiler that supports both SRAM and Gain Cell RAM (GCRAM) and generates macro-level designs and layouts for comme…
Kepler Compute, a new memory startup, announced it is developing leadership memory beyond HBM and SRAM that it says can be built without dependence on EUV lithography, with sampling planned for 2026 a…
SRAM serves as the staging ground for KV Cache values written from HBM in LLM inference, and its size directly determines the maximum local data available to local compute, according to a technical de…
Cornell Tech researchers have developed an optical memory link that uses QR-code-like light patterns to directly edit static random-access memory (SRAM) on AI processors, eliminating power-hungry anal…
IBM Research announced the world's first sub-1 nanometer chip technology at the 0.7nm node on June 25, 2026, using a vertically stacked 3D nanosheet architecture called 'nanostack' to overcome quantum…
A new technique called Flash Attention uses tiled attention to fit the N×N attention matrix into SRAM, reducing memory reads/writes and speeding up self-attention in transformers.…
A technical analysis calculates the dollar cost per user for serving large language models at scale using napkin math, breaking down GPU resources, matrix multiplication costs, and attention mechanism…
A developer implemented FlashAttention's forward and backward passes from scratch in pure CUDA C++, achieving O(N) memory complexity through manual SRAM tiling and online softmax recurrence. A rejecte…