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What Irregularity Costs: CUDA C++, Rust, and Triton

A new study comparing CUDA C++, Rust via NVIDIA's cuda-oxide, and Triton on a hash-blocked TSDF fusion kernel found that Triton is more than an order of magnitude slower than hand-written CUDA C++ on the irregular stage, while Rust remains close to CUDA C++. The authors attribute Triton's slowdown to a compile-time-bounded probe loop and a missing mask in tl.atomic_cas, and Rust's slowdown to L1 cache bypass due to GPU-scope atomic loads. The study also reports a defect in cuda-oxide that was fixed and merged upstream.

read3 min views1 publishedAug 11, 2026
What Irregularity Costs: CUDA C++, Rust, and Triton
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[Submitted on 8 Aug 2026]


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Abstract:GPU language comparisons are almost always run on tiled dense linear algebra, where every toolchain is good and the differences are small. We implement the same hash-blocked TSDF fusion kernel in CUDA C++, in Rust through NVIDIA's cuda-oxide, and in Triton, and measure it on a workload with the opposite character: an open-addressed hash table with compare-exchange insertion, data-dependent per-lane probe depth, and contended scatter.

The result is a split. On the regular stage, which walks a truncation band and accumulates, all three languages land within a small factor of each other. On the irregular stage, which probes and inserts, Rust stays close to hand-written CUDA C++ while Triton is more than an order of magnitude slower. Language choice is nearly free on the work that is usually benchmarked and expensive on the work that is not.

We attribute both gaps to specific things the languages cannot express, not to ratios. Triton's cost follows from a probe loop that must run to a compile-time bound and from tl.atomic_cas taking no mask, which forces a scratch structure with no counterpart in CUDA. Rust's cost was invisible in every instruction count: its kernel issues fewer instructions, fewer compare-exchanges and fewer registers at identical occupancy, yet was slower. Hardware counters located it in L1 residency. A GPU-scope atomic load must be coherent across SMs, no NVIDIA L1 is, so the type-correct way to read a shared location bypasses the cache on every access.

Triton's bounded probe is also a correctness problem for fusion: at load factors an ordinary depth trajectory reaches, it silently discards blocks and the reconstruction loses patches of surface with nothing reported. We also report a defect found and fixed in cuda-oxide itself, now merged upstream: its scoped atomic load and store could not be called at all in the build mode that produces real kernels.

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