# UALink – Ultra Accelerator Link – Open-Source/Hardware Alternative to NVLink

> Source: <https://en.wikipedia.org/wiki/UALink>
> Published: 2026-10-21 03:39:56+00:00

# UALink

| UALink |  | 
|---|---|
| Ultra Accelerator Link |  | 
| Year started | 2024 | 
| First published | 23 October 2024 | 
| Latest version | 2.0 7 April 2026 | 
| Organization | UALink Consortium | 
| Related standards | [Infinity Fabric](https://en.wikipedia.org/wiki/Infinity_Fabric) ,[Ultra Ethernet](https://en.wikipedia.org/wiki/Ultra_Ethernet?action=edit&redlink=1) | 
| Website | [ualinkconsortium](http://ualinkconsortium.org) | 

**Ultra Accelerator Link** (**UALink**) is an [open specification](https://en.wikipedia.org/wiki/Open_specification) for a [die](<https://en.wikipedia.org/wiki/Die_(integrated_circuit)>)-to-die [interconnect](<https://en.wikipedia.org/wiki/Interconnect_(integrated_circuits)>) and [serial bus](<https://en.wikipedia.org/wiki/Bus_(computing)>) between [AI accelerators](https://en.wikipedia.org/wiki/AI_accelerator). It is co-developed by [Alibaba](https://en.wikipedia.org/wiki/Alibaba_Group), [AMD](https://en.wikipedia.org/wiki/AMD), [Apple](https://en.wikipedia.org/wiki/Apple_Inc.), [Astera Labs](https://en.wikipedia.org/wiki/Astera_Labs), [AWS](https://en.wikipedia.org/wiki/AWS), [Cisco](https://en.wikipedia.org/wiki/Cisco), [Google](https://en.wikipedia.org/wiki/Google), [Hewlett Packard Enterprise](https://en.wikipedia.org/wiki/Hewlett_Packard_Enterprise), [Intel](https://en.wikipedia.org/wiki/Intel), [Meta](https://en.wikipedia.org/wiki/Meta_Platforms), [Microsoft](https://en.wikipedia.org/wiki/Microsoft) and [Synopsys](https://en.wikipedia.org/wiki/Synopsys).<sup>[\[1\]](#cite_note-1)</sup> The *UALink Consortium* officially incorporated as an organization and [electronics industry](https://en.wikipedia.org/wiki/Electronics_industry) [consortium](https://en.wikipedia.org/wiki/Consortium) in 2024, for promoting and advancing UALink.

Its first specification will provide interconnectivity specifically for a scalable network. The initial 1.0 version 200Gbps UALink specification, is based on the [IEEE P802.3dj](https://en.wikipedia.org/wiki/IEEE_802.3) 200 Gb/s (Ultra Ethernet) PHY Layer. Each system node is made up of a host and as many accelerators as needed, and is managed by one OS image. The accelerators can be connected to the host using a variety of interconnect protocols ([CXL](https://en.wikipedia.org/wiki/Compute_Express_Link), [PCIe](https://en.wikipedia.org/wiki/PCIe), XGMI, CHI c2c, [Infinity Fabric](https://en.wikipedia.org/wiki/Infinity_Fabric)). UALink Switches (ULS) connect up to 1024 accelerators within an AI 'pod', where each Accelerator is assigned a unique 10-bit routing identifier. Each UALink Switch port connects to a distinct Accelerator.<sup>[\[2\]](#cite_note-2)</sup> AMD [Infinity Fabric](https://en.wikipedia.org/wiki/HyperTransport#Infinity_Fabric) is expected to be the main shared-memory protocol.[\[3\]](#cite_note-3)

The specification was due to be available to Contributor Members in 2024.<sup>[\[4\]](#cite_note-4)</sup> The 1.0 version (UALink_200) was released to the public in 2025. Members of the public can download an "evaluation copy" after providing contact information.[\[5\]](#cite_note-UA200_10EC-5)

Version 2.0 of the specification was published in April 2026.[\[6\]](#cite_note-6)

## References

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1. [↑](#cite_ref-1)["UALink Members UCIe"](https://www.ualinkconsortium.org/members) .*ualinkconsortium.org* . Retrieved 2024-11-01.
2. [↑](#cite_ref-2)["UALink 1.0 White Paper v3"](https://web.archive.org/web/20250809025256/https://ualinkconsortium.org/wp-content/uploads/2025/04/UALink-1.0-White_Paper_v3.pdf) (PDF). Archived from[the original](https://ualinkconsortium.org/wp-content/uploads/2025/04/UALink-1.0-White_Paper_v3.pdf) (PDF) on 2025-08-09.
3. [↑](#cite_ref-3) Morgan, Timothy Prickett (30 May 2024).["Key Hyperscalers And Chip Makers Gang Up On Nvidia's NVSwitch Interconnect"](https://www.nextplatform.com/connect/2024/05/30/key-hyperscalers-and-chip-makers-gang-up-on-nvidias-nvswitch-interconnect/1650834) . The Next Platform. Retrieved 19 May 2026.
4. [↑](#cite_ref-4)["ABOUT UALINK"](https://www.ualinkconsortium.org/about-ualink) .*UALink Consortium* . Retrieved 2025-01-20.
5. [↑](#cite_ref-UA200_10EC_5-0)["Ultra Accelerator Link Consortium, Inc.™ UALink_200 Rev 1.0 Specification"](https://ualinkconsortium.org/specification/) .*ualinkconsortium.org* .[pdf](https://ualinkconsortium.org/wp-content/uploads/2025/04/UALink200_Specification_v1.0_Evaluation_Copy.pdf)
6. [↑](#cite_ref-6) Cooter, Maxwell (7 April 2026).["New v2 UALink specification aims to catch up to NVLink"](https://www.networkworld.com/article/4155357/new-v2-ualink-specification-aims-to-catch-up-to-nvlink.html) . Network World. Retrieved 19 May 2026.

## See also

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## External links

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- [Ultra Ethernet Consortium](https://ultraethernet.org) (has a draft-sharing relationship with IEEE P802.3dj)