| UALink | |
|---|---|
| Ultra Accelerator Link | |
| Year started | 2024 |
| First published | 23 October 2024 |
| Latest version | 2.0 7 April 2026 |
| Organization | UALink Consortium |
| Related standards | [Infinity Fabric](https://en.wikipedia.org/wiki/Infinity_Fabric) ,[Ultra Ethernet](https://en.wikipedia.org/wiki/Ultra_Ethernet?action=edit&redlink=1) |
| Website | [ualinkconsortium](http://ualinkconsortium.org) |
Ultra Accelerator Link (UALink) is an open specification for a die-to-die interconnect and serial bus between AI accelerators. It is co-developed by Alibaba, AMD, Apple, Astera Labs, AWS, Cisco, Google, Hewlett Packard Enterprise, Intel, Meta, Microsoft and Synopsys.<sup>[1]</sup> The UALink Consortium officially incorporated as an organization and electronics industry consortium in 2024, for promoting and advancing UALink.
Its first specification will provide interconnectivity specifically for a scalable network. The initial 1.0 version 200Gbps UALink specification, is based on the IEEE P802.3dj 200 Gb/s (Ultra Ethernet) PHY Layer. Each system node is made up of a host and as many accelerators as needed, and is managed by one OS image. The accelerators can be connected to the host using a variety of interconnect protocols (CXL, PCIe, XGMI, CHI c2c, Infinity Fabric). UALink Switches (ULS) connect up to 1024 accelerators within an AI 'pod', where each Accelerator is assigned a unique 10-bit routing identifier. Each UALink Switch port connects to a distinct Accelerator.<sup>[2]</sup> AMD Infinity Fabric is expected to be the main shared-memory protocol.[3]
The specification was due to be available to Contributor Members in 2024.<sup>[4]</sup> The 1.0 version (UALink_200) was released to the public in 2025. Members of the public can download an "evaluation copy" after providing contact information.[5]
Version 2.0 of the specification was published in April 2026.[6]
References #
[
[edit](https://en.wikipedia.org/w/index.php?title=UALink&action=edit§ion=1)]
1. [↑](#cite_ref-1)["UALink Members UCIe"](https://www.ualinkconsortium.org/members) .*ualinkconsortium.org* . Retrieved 2024-11-01.
- ↑"UALink 1.0 White Paper v3" (PDF). Archived fromthe original (PDF) on 2025-08-09.
- ↑ Morgan, Timothy Prickett (30 May 2024)."Key Hyperscalers And Chip Makers Gang Up On Nvidia's NVSwitch Interconnect" . The Next Platform. Retrieved 19 May 2026.
- ↑"ABOUT UALINK" .UALink Consortium . Retrieved 2025-01-20.
- ↑"Ultra Accelerator Link Consortium, Inc.™ UALink_200 Rev 1.0 Specification" .ualinkconsortium.org .pdf
- ↑ Cooter, Maxwell (7 April 2026)."New v2 UALink specification aims to catch up to NVLink" . Network World. Retrieved 19 May 2026.
See also #
[
[edit](https://en.wikipedia.org/w/index.php?title=UALink&action=edit§ion=2)]
External links #
[
[edit](https://en.wikipedia.org/w/index.php?title=UALink&action=edit§ion=3)]
- [Ultra Ethernet Consortium](https://ultraethernet.org) (has a draft-sharing relationship with IEEE P802.3dj)