TSMC’s COUPE Roadmap: Integrating Light Sources to Solve the AI Interconnect Bottleneck

TSMC's Dr. Ming-Fa Chen presented updates on the COUPE silicon photonics platform at SEMICON Taiwan 2026, detailing plans to integrate modulators, light sources, and Semiconductor Optical Amplifiers (SOA) onto the platform's backside. The goal is to evolve COUPE into an 'optical interposer' to address the growing I/O performance gap in AI computing, which is widening significantly faster than I/O performance improvements. The massive growth in AI token usage (projected 24x increase by 2030 from 2026) is driving demand for high-performance optical interconnects, with COUPE offering 4-10x better power efficiency and 10-20x lower latency compared to copper.

TSMC’s COUPE Roadmap: Integrating Light Sources to Solve the AI Interconnect Bottleneck TSMC's Dr. Ming-Fa Chen presented updates on the COUPE silicon photonics platform at SEMICON Taiwan 2026, detailing plans to integrate modulators, light sources, and Semiconductor Optical Amplifiers SOA onto the COUPE platform's backside. AsiaAI Publisher · August 31, 2026 · 2 min read · Source: 科技新報 TechNews Semiconductors & Hardware TSMC’s Dr. Ming-Fa Chen presented updates on the COUPE silicon photonics platform at SEMICON Taiwan 2026, detailing plans to integrate modulators, light sources, and Semiconductor Optical Amplifiers SOA onto the COUPE platform‘s backside. The goal is to evolve COUPE into an “optical interposer” to address the growing I/O performance gap in AI computing, which is widening significantly faster than I/O performance improvements. The massive growth in AI token usage projected 24x increase by 2030 from 2026 is driving demand for high-performance optical interconnects. TSMC’s COUPE Co-CoW packaging for Optical and Electrical integration is a crucial part of the industry’s shift from traditional copper to optical transmission to overcome the ‘I/O wall’ bottleneck, offering 4-10x better power efficiency and 10-20x lower latency compared to copper.