The rise and fall of IBM's 4 Pi aerospace computers: an illustrated history

The article summarizes the history of IBM's System/4 Pi family of aerospace computers, introduced around 1967, which were used in military aircraft, missiles, submarines, and NASA programs like Skylab and the Space Shuttle. It details the various models, including the TC (Tactical Computer), CP (Customized Processor), and EP (Extended Performance), and highlights the TC-1's role in controlling Skylab's orientation. The author notes that despite their significance, information on these computers is scarce, with Wikipedia omitting several models.

The morning of April 12, 1981, 20 years to the day after Yuri Gagarin became the first person in space, the Space Shuttle thundered into the Florida sky. Commander Young and Pilot Crippen were at the controls as the Shuttle ascended on its first flight. But the launch, like much of the flight, was really under the control of four computers in the avionics bays one deck below the crew. A fifth computer stood ready to take over in case of a catastrophic computer malfunction. These computers, Model AP-101B, were part of IBM's System/4 Pi family. Introduced around 1967, the System/4 Pi family was a line of compact, powerful computers designed for avionics roles. The military used these computers in everything from the F-4 fighter and B-52 bomber to submarine sonar systems and the Harpoon anti-ship missile. Other computers in the System/4 Pi family played more peaceful roles in the development of GPS and fly-by-wire flight controls. In space, System/4 Pi computers controlled Skylab, the first American space station, as well as Spacelab, the reusable laboratory flown by the Space Shuttle. Despite the important roles of System/4 Pi computers, information on them is hard to obtain—Wikipedia entirely omits the CC, SP, and ML models.1 However, I received a stack of 4 Pi marketing brochures and articles, so I can now fill in many gaps in the history of System/4 Pi. The IBM System/360 line of mainframes was introduced in 1964. System/360 revolutionized the computer industry with the concept of one family of computers for all applications: business and scientific. The name symbolized that System/360 covered the full 360º of applications. The 4 Pi name extended this idea to applications in the 3-dimensional world: 4π is the number of steradians making up a full sphere. As IBM put it, "System/4 Pi also fills a sphere—the full spectrum of military computer needs—for airborne, space, or shipboard use." Initially, the System/4 Pi family had three models: "Model TC tactical computer for satellites, tactical missiles, helicopters, and other applications requiring a very small, lightweight computer; Model CP customized processor for real-time computing applications; and Model EP extended performance for applications that require real-time calculation of very large amounts of data."2 The TC Tactical Computer was a general-purpose digital computer, designed for low cost and medium-range performance details . The TC had a 16- or 32-bit word, but used an 8-bit bus to reduce cost. It supported from 8 KB to 64 KB of magnetic core memory. It has a straightforward instruction set with 54 instructions in total, including multiply and divide. As was common at the time, it didn't have a stack for subroutine calls, but had a branch-and-store instruction instead. The original model ran 48,500 instructions per second. While this is appallingly slow by modern standards, it was mainframe-level performance at the time, comparable to a mid-range IBM 360/40 mainframe. The TC was originally packaged in a briefcase-sized box 9.75" × 17.12" × 4.0" below that weighed 17.3 pounds, but it could be repackaged for different applications. For a tactical missile, the computer was implemented on semicircular circuit boards as shown above. The computer was constructed from TTL Transistor-Transistor Logic 3 flatpack integrated circuits mounted on four-layer circuit boards. Two circuit boards made a sandwich around a metal structure that provided support and cooling; this three-layer assembly was called a "page". A page could hold about 300 integrated circuits, so the computer was very dense. TC-1 computers played a critical role in Skylab, America's first space station, which was launched in 1973.4 The orientation of Skylab needed to be precisely controlled to aim its multiple telescopes. To avoid consuming propellant, Skylab was rotated by changing the speed of three massive gyroscopes, 155 pounds each. Two TC-1 computers controlled these gyroscopes, with one computer active and one computer as a backup. Each 16-bit computer had 16K words of storage that could be reloaded from magnetic tape or radio, and executed 60,000 operations per second. Each Skylab computer occupied 2.2 cubic feet much larger than the briefcase-sized TC and weighed 97.5 pounds. The Skylab computers are notable as the first fully digital control system on a crewed spacecraft. The TC-2 model below was much faster 125,000 operations per second and weighed 80 pounds. It was used for Navigation/Weapons Delivery in the A-7D/E attack fighter. In 1976, it was upgraded to the TC-2A, which was still faster 454,000 operations per second , supported more memory, and added 12 more instructions. Like most computers in its era, the TC used magnetic core memory; each bit was stored in a tiny toroidal core of lithium nickel ferrite, strung onto a grid.5 The core planes in the TC and other first-generation 4 Pi computers were about 6 inches on a side. With 16,384 cores in a plane, each plane held 16 Kbits. Thus, the 8-kilobyte memory in the TC required a stack of four core planes. A significant advantage of core memory was that, because it was magnetic, the data was preserved even when the memory was not powered. It was also highly resistant to radiation. One step up from the TC series was the CP Customized Processor briefly called Cost Performance .6 It used a 16-bit CPU, but had a wide 36-bit bus to memory for higher performance including two parity bits and two storage protection 7 bits . Unlike the TC series, the CP series was optionally microcoded internally, so the instruction set could be easily customized.8 The CP system had completely different instruction formats from the TC system.10 The base model had 36 instructions and executed 91,000 instructions per second. The CP supported multiple addressing modes, more advanced than the simple addressing of the TC system. While the TC ran at 330 kHz, the CP ran at 2.4 megahertz. The CP's performance didn't improve as much as the faster clock would suggest, since both systems used slow core memory. One of the strengths of System/4 Pi was input/output, allowing it to communicate with external devices in real time. The CP-1 had extensive I/O capabilities: three high-speed parallel inputs, a high-speed parallel output, a serial output, 24 discrete input lines, 144 discrete output lines, and 24 interrupt lines. To support all these I/O signals, the CP-1 was packaged in two boxes: one for the computer itself, and one for the I/O interface. The CPU box is shown below; the I/O coupler box was similar, but the front sported over a dozen connectors for I/O lines. The CP-1 was used in the navigation/threat analysis system in the EA-6B Prowler electronic-warfare aircraft.9 The CP-2 was the navigation/weapons delivery computer in the F-111 fighter plane, integrating radar and weapons. It was faster than the CP-1, perhaps because it was not microprogrammed, executing 150,000 instructions per second. It was also smaller, occupying one 47-pound box, although it had less I/O support. Unfortunately, this F-111 computer was said to be a disaster operationally because the computer had reliability problems and limited performance. The CP-2 was later replaced by the enhanced CP-2EX. The CP-3 computer below was used for navigation and weapons delivery in the A-6E Intruder 1970 and other aircraft, replacing an earlier Litton computer with an unreliable drum memory. This computer could be integrated with laser-guided "smart" bombs. It was similar to the CP-2 and had the same performance, but had different I/O functions. Like the TC, the CP was constructed from flat-pack TTL chips mounted on circuit boards called "pages". However, the CP used smaller pages with six layers instead of four; each double-sided page could hold up to 156 integrated circuits. Each page had two 98-pin connectors, reusing the style of connector that IBM used in Apollo for the Saturn V rocket's Launch Vehicle Digital Computer LVDC . IBM standardized on this type of page for decades; the page below was used in the AWACS computer 1991 and is almost identical to the pages in the CP computer in 1967. The EP was the most powerful of the original System/4 Pi computers. It was a 32-bit computer compatible with IBM System/360 mainframes, specifically the 360 Model 44.11 For input/output, the EP used the same I/O channel architecture as the System/360 mainframes. To support the complicated 360 instruction set, the EP was microcoded. It executed 190,000 instructions per second and weighed 75 pounds. Floating-point support was available as an option. A multiprocessor version of EP, the EP/MP, supported up to three CPUs sharing memory. It was delivered for the Air Force's Manned Orbiting Laboratory MOL , but the MOL project was canceled details . The multiprocessor system was also used for the VS ANEW anti-submarine research project, part of the VSX program that led to the Lockheed S-3 Viking, an aircraft that used the System/4 Pi SP-0A computer instead of the EP. Early in 1970, IBM created the Advanced System/4 Pi family.12 These 32-bit systems were significantly faster, smaller, and more advanced than the previous System/4 Pi computers. These computers took advantage of improved integrated circuits, called Medium-Scale Integration MSI . These integrated circuits held 10 to 100 gates per chip, compared to the earlier Small-Scale Integration SSI chips with 1 to 10 gates per chip, allowing a chip to implement a more complex function, such as a shift register, counter, or adder. Moreover, these computers used faster core memory, reducing the memory cycle time from 2.5 µs to 1 µs. This series originally consisted of three lines: Advanced Processor AP , Subsystem Processor SP , and Command and Control CC . The AP line is the largest and most famous, powering the Space Shuttle as well as numerous aircraft. A few years later, IBM introduced the ML line. Although the SP, CC, and ML lines are obscure, they have some interesting features. For the most part, the AP computers used an instruction set and architecture that was derived from the System/360, called MMP Multipurpose Midline Processor .13 Unlike the EP computers, the AP computers were incompatible with System/360: the instruction format, the registers, the addressing modes, and the condition codes were different. Some AP computers used a 16-bit instruction set that was an Air Force Standard, called MIL-STD-1750A. The Advanced Processor line started with the AP-1, a 32-bit processor that performed 450,000 instructions per second and weighed 36 pounds. It could be programmed in assembler or the military's JOVIAL language. It supported 16K halfwords to 64K halfwords of storage internally, and more could be added in an external box. It had four high-speed I/O channels, handling up to 15 devices per channel. Floating point was available as an option. The AP-1 is described in detail here. The AP-1 computer was used in the F-15 fighter for navigation/weapon delivery and data management. It was also used by Japan in the F-4 fighter. An upgraded computer, the AP-1R, had 256K of core memory and performed over 1 million instructions per second; it was used in the F-15E aircraft in 1983. The AP-1A was used in the development of the AWACS Seek Bus tactical communication system and the Joint Tactical Information Distribution System JTIDS . The AP-2 computer was almost identical to the AP-1 in appearance and functionality, with some changes to its I/O capabilities. It was used in the Central Integrated Test System CITS on the B-1 bomber to provide real-time testing and troubleshooting details . The AP-101 computer expanded the AP-1's instruction set from 83 instructions to 151, as well as having slightly faster core memory. The first nine AP-101 computers were used in NASA's digital fly-by-wire research program that used the F-8 fighter link . The AP-101 was also used for GPS development. Around 197