{"slug": "t-head-unveils-zhenwu-v900-ai-chip-in-alibabas-push-to-expand-its-ai-stack", "title": "T-Head unveils Zhenwu V900 AI chip in Alibaba’s push to expand its AI infrastructure stack", "summary": "T-Head, Alibaba's chip subsidiary, unveiled the Zhenwu V900 AI chip for training and inference at the 2026 Apsara Conference in Hangzhou, claiming three times the performance of its predecessor, the Zhenwu M890. The V900 carries 216GB of memory, 1,200GB/s of inter-chip bandwidth, and native support for FP8 and FP4 low-precision formats, and T-Head says more than 1,000 V900 chips can operate as a single system, with a single AI computing cluster scaling to as many as 500,000 accelerators. T-Head also said the Zhenwu series has served more than 650 enterprise customers and set a Yitian server CPU roadmap with the Yitian 720 and Yitian 730 launching in the third quarter of 2027.", "body_md": "T-Head, Alibaba’s chip subsidiary, today unveiled its next-generation Zhenwu V900 AI chip for both training and inference at the 2026 Apsara Conference in Hangzhou. The company also outlined its roadmap for future Yitian server CPUs.\n\nThe announcements show T-Head expanding beyond individual AI accelerators toward a full-stack chip strategy covering computing, storage, and networking as AI models grow larger and agentic applications become more widespread.\n\nThe Zhenwu V900 is T-Head’s latest high-end AI chip for AI computing workloads. Based on the company’s proprietary parallel computing architecture, the V900 is claimed by T-Head to deliver three times the performance of its predecessor, the Zhenwu M890, making it the company’s most powerful in-house AI chip to date.\n\nThe V900 comes with 216GB of memory and offers 1,200GB/s of inter-chip bandwidth, according to the company. It natively supports low-precision computing formats including FP8 and FP4.\n\nFor large-model training and inference, the larger memory capacity can reduce the overhead associated with model partitioning and data movement, while lower-precision computing can improve efficiency for certain workloads and help reduce inference costs.\n\nThe V900 is designed to operate as part of a larger system rather than simply as a standalone accelerator. T-Head uses its proprietary ICN Switch interconnect chips to connect multiple V900 chips into supernodes, providing native memory semantics and unified memory addressing while enabling full-bandwidth interconnection across thousands of AI chips.\n\nAccording to T-Head, more than 1,000 V900 chips can work together as a single system. The architecture is designed for workloads such as training trillion-parameter models and handling the large-scale inference demand generated by AI agents.\n\nFor these workloads, adding more AI accelerators alone is not enough. Communication between chips, along with coordination across computing, storage, and networking components, also becomes increasingly important.\n\nAt the conference, Alibaba also showcased a new-generation supernode server integrating the Zhenwu V900, ICN Switch, Panmai smart NIC, and Zhenyue SSD controller. The system brings computing, networking, and storage components together under a unified architecture.\n\nCombined with Alibaba Cloud’s newly designed AI computing center network architecture, T-Head says a single AI computing cluster using these chips can scale to as many as 500,000 accelerators.\n\nThe strategy predates the V900. Supernode servers based on the Zhenwu M890 have already entered large-scale commercial deployment and support models with more than 2 trillion parameters, including Qwen3.8 and Kimi K3. The related capabilities are also available to developers through Alibaba Cloud’s Bailian platform.\n\nT-Head said its Zhenwu series has so far served more than 650 enterprise customers across sectors including autonomous driving, finance, large language models, embodied AI, energy, and manufacturing.\n\nAlongside its AI accelerators, T-Head also provided more details on the roadmap for its Yitian server CPUs. According to the roadmap announced at the conference, the Yitian 720 and Yitian 730 are scheduled to launch in the third quarter of 2027.\n\nThe Yitian 720 will focus on improvements in single-core performance, core density, and energy efficiency. The Yitian 730 will use a CPU microarchitecture developed by T-Head, with single-core SPECint2017/GHz performance of up to 1.4 times that of the Yitian 710.\n\nThe subsequent Yitian 750 will support T-Head’s proprietary ICN inter-chip interconnect protocol, which will enable the CPU to connect directly with Zhenwu AI chips. As AI servers become more complex, closer coordination between CPUs and AI accelerators is becoming part of system-level design rather than simply a matter of combining different types of chips in the same server.\n\nTaken together, the product roadmap points to a broader chip portfolio spanning CPUs, AI accelerators, networking, and storage. Rather than focusing solely on the performance of individual chips, this full-stack approach reflects a broader shift in AI infrastructure.\n\nAs model sizes and inference workloads grow, bottlenecks increasingly extend beyond raw compute to areas such as chip-to-chip communication, memory capacity, network bandwidth, and data access.\n\nT-Head said the Zhenwu V900 is expected to enter mass production and go on sale in the first quarter of 2027. Alibaba Group CEO Wu Yongming said during the conference that T-Head expects its annual AI chip shipments to increase as its products see wider adoption.\n\nDuring the Apsara Conference, T-Head also showcases its full-stack chip solutions and hold hands-on workshops around the T-Head SAIL software stack, covering areas such as model training, inference, and software optimization.\n\nFor Alibaba, the V900 is part of a broader effort to build an AI computing stack that spans chips, networking, storage, and software, rather than relying on standalone accelerators.\n\nFor China’s AI chip industry, the move also highlights the growing focus on system-level infrastructure, as domestic chipmakers look to compete not only on accelerator performance but also on the interconnect, memory, and software layers needed to run increasingly large AI models.", "url": "https://wpnews.pro/news/t-head-unveils-zhenwu-v900-ai-chip-in-alibabas-push-to-expand-its-ai-stack", "canonical_source": "https://technode.com/2026/09/22/t-head-unveils-zhenwu-v900-ai-chip-in-alibabas-push-to-expand-its-ai-infrastructure-stack/", "published_at": "2026-09-22 12:33:17+00:00", "updated_at": "2026-09-22 12:55:24.721033+00:00", "lang": "en", "topics": ["ai-chips", "ai-infrastructure", "ai-products", "large-language-models"], "entities": ["T-Head", "Alibaba", "Zhenwu V900", "Zhenwu M890", "Yitian 710", "Yitian 720", "Yitian 730", "Apsara Conference"], "alternates": {"html": "https://wpnews.pro/news/t-head-unveils-zhenwu-v900-ai-chip-in-alibabas-push-to-expand-its-ai-stack", "markdown": "https://wpnews.pro/news/t-head-unveils-zhenwu-v900-ai-chip-in-alibabas-push-to-expand-its-ai-stack.md", "text": "https://wpnews.pro/news/t-head-unveils-zhenwu-v900-ai-chip-in-alibabas-push-to-expand-its-ai-stack.txt", "jsonld": "https://wpnews.pro/news/t-head-unveils-zhenwu-v900-ai-chip-in-alibabas-push-to-expand-its-ai-stack.jsonld"}}