# RISC-V Europe Summit 2026: Beyond Embedded Electronics > Source: > Published: 2026-07-20 07:42:44+00:00 The [RISC-V Summit Europe 2026](https://www.eetimes.com/risc-v-summit-europe-2026-industry-and-academia-unite-in-bologna-to-advance-open-hardware/), held last month in Bologna, Italy, brought together semiconductor designers, software developers, and aerospace engineers. The event showed how the RISC-V open-standard instruction set architecture has expanded beyond specialized industrial applications to target data centers, edge AI, and space exploration. Andrea Gallo, CEO of RISC-V International, [opened the summit](https://www.eetimes.com/risc-v-targets-data-centers-edge-ai-space/) with a clear message to a packed audience: “RISC-V is now”. He later told EE Times that the architecture is poised for significant commercial growth, especially following the official ratification of the RISC-V Server Platform Specification 1.0, which is based on the RVA23 profile. This important step brings industry-standard boot systems and runtime services, such as UEFI and ACPI 6.6, to RISC-V, ensuring system software runs smoothly across different server hardware. Gallo pointed out that this standardization gives multinational companies and governments more choice and protects them from being locked into a single vendor. The summit made it clear that RISC-V is now seen as much more than an academic project or a basic embedded controller. Developer workshops were sold out, with 120 engineers working on hands-on debugging and advanced hardware design challenges. [View All](https://www.eetimes.com/category/sponsored-content/) At the same time, discussions covered topics from running advanced neural networks at the edge to testing high-performance processors in space. These talks showed that RISC-V now has a mature ecosystem, with support from big companies and fast-growing startups. ### State of the Union The [state of the RISC-V union is “strong,”](https://www.eetimes.com/risc-v-is-inevitable-state-of-the-union-keynote-argues/) declared Krste Asanović, chief architect at SiFive and RISC-V International, and RISC-V project lead at Berkeley, during his “State of the Union” keynote. Asanović pointed out that RISC-V’s open-standard architecture is moving beyond embedded electronics and into high-performance computing and enterprise server farms. Big tech companies such as Meta, Google, Nvidia, Qualcomm, and Alibaba are now adding RISC-V technology to their portfolios. A key part of this move into enterprise is the RVA23 standard, which integrates hardware and software into a single framework. Asanović told EE Times by email after the event, “We are already working closely with several hyperscalers and data center owners and suppliers to design these next-generation processors.” He added, “They are investing in RISC-V as an alternative to the incumbent architectures as it provides much greater flexibility, both in technical features and in the business model, and there is no barrier to providing dominant performance in this space.” Asanović also spoke to engineers who sometimes remove core features to save space, cautioning them not to fragment the ecosystem. He said, “Having too many options means you don’t have a profile, you don’t have a standard, you just have a bunch of options. We already have that. The whole point of the standard here is to set a set of mandated features everybody can rely on.” He ended his keynote by expressing strong confidence in the architecture’s modular design and its potential for AI accelerators. He said, “RISC-V gives you this unique opportunity to innovate and handle many different workloads, but in all new ways, all with a standard framework underpinning it and no barrier to you trying things out.” ### RISC-V is going to space During the “RISC-V in Space” session, experts from the European Space Agency (ESA), NASA’s Jet Propulsion Laboratory, Microchip, and Frontgrade Gaisler discussed the rapid adoption of RISC-V in the aerospace industry. The industry is moving away from older architectures such as SPARC, which are expensive to update and have fewer available engineers. Instead, they are [choosing the open-standard RISC-V architecture](https://www.eetimes.com/space-industry-is-standardizing-on-risc-v/) to reduce technical debt and build spaceflight computers that are highly radiation- and fault-resistant. To help with this shift, [Frontgrade Gaisler](https://www.gaisler.com/) introduced the NOEL processor line, which is compatible with RISC-V and built on open-source foundations, so there is no vendor lock-in. At the same time, NASA is testing the eight-core RISC-V PIC64-HPSC processor for its next-generation deep space missions. ### RISC-V processors could help manage megaforests At the summit, [researchers from the University of São Paulo](https://www.eetimes.com/risc-v-silicon-in-the-jungle-could-save-the-amazon/) introduced the “Internet of Trees,” a project to deploy a real-time monitoring network that would act as a digital nervous system for the Amazon rainforest. Professors Marcelo Zuffo and Laisa Costa told EE Times that they built their PULGA microcontrollers using RISC-V, which helped them avoid licensing fees and the “Black Box” dependence that comes with proprietary chips. This approach lets them create efficient, multi-layered mesh networks. In these networks, sensor nodes work together like a swarm, using built-in neural networks to process chemical compounds locally. This setup can automatically detect illegal logging, mining, and forest fires without sending raw data to the cloud for analysis. ### Targeting data centers and physical AI With the [RVA23 profile](https://riscv.org/blog/risc-v-rva23-a-major-milestone/) now ratified, 2026 is being called the “year of the RVA silicon” for data centers. Many startups and large companies are releasing powerful new server-class processors with up to 128 cores to compete with Arm and x86. The summit also highlighted the growth of “physical AI,” which enables machines, such as robots, to make decisions and interact directly with the physical world. RISC-V meets the very low power needs of physical AI by using advanced vector and matrix extensions. These features let complex AI algorithms run on the same core as the control software, so there is no need to transfer data to a separate neural processing unit, which can be slow and power-hungry. ##### See also: **When Arm Meets RISC-V: SiPearl, Semid****ynamics to Co-Develop Sovereign AI Platform** SiPearl and Semidynamics have announced a partnership to build one of the first European sovereign rack-scale AI platforms.