Retroid Pocket Duo Lite running mainline Debian: gaps left, help needed A community-maintained mainline Debian port for the Retroid Pocket Duo Lite is missing working microphone capture because upstream Linux never wired the VA macro's DMIC clock enable into the TX macro, according to a technical reply drafted with Anthropic's Claude and posted in the project's forum thread. The reply argues the fix is a device-tree change rather than a sound-card rewrite: add a VA macro node modeled on sm8250.dtsi's vamacro with qcom,dmic-sample-rate = <2400000>, add a va-dai-link using VA_CODEC_DMA_TX_0, and route "VA DMIC2" to "MIC BIAS1" instead of the TX DMIC2 path. The author notes the vendor bolero_dmic_clk_enable register tables at 0x3084/0x3088/0x308c/0x3090 with enable masks 1/2/4/8 match mainline's va_dmic_clk_enable() in lpass-va-macro.c, and that the SWR_DMICn_CTL register only selects a SoundWire mic clock. Hello Brotha I dunno much about any of this, but, I can point Fable at it. So, I did. 10 mins of compute from Anthropics flag ship coming at ya. My morning on the internet is filled with neckbeard passive aggressive vitriol possibly rooted in some new AI inferiority complex. So, I don’t wanna be that guy. I hope this helps. “Reviewing a forum post about mainline Linux setup. Reviewing a forum post about mainline Linux setup. I’ll pull the repo and look at the actual device tree and audio config before answering, since the SM6125 audio/Venus issues are very configuration-specific. Ran 21 commands I cloned the repo and read docs/MICROPHONE.md , docs/SPEAKERS-NEXT.md , docs/HELP-WANTED.md and the gaming/Venus scripts, then checked them against the upstream drivers lpass-tx-macro.c , lpass-va-macro.c , aw88166.c , venus pm helpers.c / hfi venus.c , gcc-sm6125.c . There are a few things he’s missed, and one of them the mic looks like a real “obvious in hindsight” answer. Here’s a reply you can post more or less as-is: Read through the repo — nice work, especially the measured docs. A few things that I think you’ve missed, in order of how confident I am. Your own disassembly already contains the answer. The vendor bolero dmic clk enable tables 0x3084/0x3088/0x308c/0x3090 , enable masks 1/2/4/8 are the VA macro’s DMIC0..3 CTL registers plus the freq-change bits in VA TOP CSR DMIC CFG . Mainline has that exact sequence already: va dmic clk enable in sound/soc/codecs/lpass-va-macro.c writes the same registers with the same masks. On Bolero the MSM DMIC clock pads are generated by the VA macro, full stop; the vendor TX macro just calls across into it. Upstream never wired that cross-call. In lpass-tx-macro.c , "TX DMIC0..7" are plain SND SOC DAPM INPUT s — nothing runs when you capture through them. The SWR DMICn CTL register you fought with is only a clock select for SoundWire mics CDC TX SWR DMIC CLK SEL MASK , bits 3:1 , which is why bit 0 never latched: it isn’t an enable. So “TX DMIC2 → TX CODEC DMA TX 3” can never produce a PDM clock on mainline. Not a bug you can patch around in TX. Why your hand-poke of the VA registers didn’t work either: nothing has voted the VA macro’s core clock with the ADSP that’s what the bolero clk rsc request clock layer you found does — it’s an AFE clock request, q6afecc in mainline . Without a bound VA macro driver, MMIO writes to the macro latch fine and nothing clocks. “Values stick, audio doesn’t appear” is exactly that. The part I think you’ve got wrong: VA CODEC DMA TX 0 is a legacy q6afe port, not an audioreach one. sound/soc/qcom/qdsp6/q6dsp-lpass-ports.c lists VA CODEC DMA TX 0 right next to the TX CODEC DMA TX 3 you already use, and qrb5165-rb5.dts captures DMICs through it with plain q6afe / q6asm — no SPF firmware. Since CDC-DMA ports already work on your ADSP TX 3 does , VA 0 almost certainly does too; Android uses it for hotword. So the fix is a DT change, not a sound-card rewrite: Add a VA macro node modelled on sm8250.dtsi ’s vamacro qcom,sm8250-lpass-va-macro , clocks mclk / macro / dcodec from &q6afecc , clock-cells , clock-output-names = "fsgen" . Take the real reg base and clock IDs from the va-macro node in your extracted Android DTB — you already have extract-android-dtb.sh . qcom,dmic-sample-rate = <2400000 the driver refuses to probe without it; 9.6 MHz / 4 matches the vendor’s 0x249f00 . DMIC pinctrl can stay on your gpio127/128 pair. Add a va-dai-link copied from RB5: cpu <&q6afedai VA CODEC DMA TX 0 , platform <&q6routing , codec <&vamacro 0 . Routing: "VA DMIC2", "MIC BIAS1" replacing the "TX DMIC2", "MIC BIAS1" line — same mux index, pair 1, just on the VA side . Then VA DMIC MUX0 = DMIC2 and VA AIF1 CAP Mixer DEC0 instead of the TX controls. Retroid’s Duo port doing it through VA wasn’t about audioreach; it’s that VA is the only macro on mainline that owns the DMIC clock. Two states the vendor driver writes at runtime that live in the AW88166’s DSP RAM, not in registers: Calibrated Re. The vendor driver loads the factory speaker-resistance calibration persist partition, aw cali -style file into the DSP. Mainline only does it if you set the Calib ALSA control, and aw dev update cali re silently ignores out-of-range values — so right now the smart-PA algorithm is running on whatever default is baked into dsp cfg . A protection algorithm with a wrong Re will clamp output. vmax. The vendor aw monitor code raises the boost-voltage ceiling in DSP memory based on battery level. Mainline aw88166.c doesn’t touch vmax at all. If the ACF default is conservative and Android’s monitor table lifts it at full battery, you’d get exactly “identical registers, much quieter”. A decisive cheap test before digging: push software gain to 2–4× PipeWire allows 1.0, e.g. wpctl set-volume