{"slug": "research-engineer-ai-for-chip-design-openai", "title": "Research Engineer, AI for Chip Design — OpenAI", "summary": "OpenAI is hiring a Research Engineer for AI for Chip Design in San Francisco at a salary of $380,000 to $500,000 per year, a range the job board reports sits 93% above the $228,000 median for AI Agents roles in the United States that publish pay. The hybrid role involves building reinforcement learning environments and evaluations for tasks including RTL generation, design verification, and physical design optimization, and developing approaches that help models use chip-design tools to improve power, performance, and area while preserving correctness. The posting notes prior chip-design experience is helpful but not required, and that candidates may need to meet certain legal status requirements to comply with U.S. export control laws.", "body_md": "# Research Engineer, AI for Chip Design\n\n- Salary\n- $380k–500k/yr\n- Location\n- San Francisco\n- Work type\n- Hybrid\n- Posted\n- today\n- Verified live\n- today\n\n[Apply on company site (opens in new tab)](https://jobs.ashbyhq.com/openai/bd2b8228-bb0f-42e0-94bd-c853cdd56140/application)\n\nFiled under[AI Agents](/ai-agent-jobs/)\n\nThis range sits **93% above** the $228k median for [AI Agents roles in the United States on this board](/ai-agent-jobs/) that publish pay (621 of 842).\n\nAbout the Team\n\nOpenAI develops models that can reason through complex problems and hardware designed for the demands of advanced AI. AI for Chips connects these efforts: applying increasingly capable AI systems to the work of semiconductor engineering.\n\nOur goal is to help engineers develop better chips and shorten design cycles. This work brings research, model training, and hardware expertise together to build tools that engineers can use on real designs, with correctness and measurable performance at the center.\n\nAbout the Role\n\nWe’re hiring a Research Engineer to help OpenAI models solve chip-design problems through reinforcement learning, tool use, and evaluation.\n\nYou’ll own experiments from the initial idea through implementation and analysis. That means building environments and evaluations, running training, investigating failures, and using the results to decide what to try next. You’ll also build the software needed to make those experiments reliable and reproducible.\n\nWe value strong coding fundamentals, careful experimental judgment, and the ability to make progress independently. Prior chip-design experience is helpful, but you can learn the domain alongside the team’s hardware specialists.\n\nIn this role, you will:\n\n- Build RL environments and evaluations for tasks such as RTL generation, design verification, and physical design optimization.\n- Develop and test approaches that help models use chip-design tools and improve power, performance, and area while preserving correctness.\n- Design experiments, establish baselines, and measure whether improvements hold up on new tasks and designs.\n- Investigate failures across model behavior, rewards, evaluation tools, and experiment infrastructure.\n- Improve iteration speed through better tooling, faster evaluations, and proxy rewards that reflect the outcomes we care about.\n- Turn successful experiments into reusable research code and training workflows, working closely with researchers and engineers.\n\nYou might thrive in this role if you:\n\n- Have strong programming and debugging skills and a track record of turning technical ideas into working software.\n- Experience with reinforcement learning, model evaluations, post-training, or other applied ML research.\n- Experience building tool-using agents, reward functions, or automated evaluation systems.\n- Can form clear hypotheses, design useful experiments, and distinguish meaningful results from noise or evaluation errors.\n- Work independently on ambiguous problems and make practical decisions about what to build or test next.\n- Stay close to the implementation and can explain what you built, what failed, and what you learned.\n- Communicate progress clearly and collaborate well with people across research, software, and hardware.\n- Care about developing safe, beneficial AI.\n\nNice to have:\n\n- Familiarity with experiment orchestration, distributed training, or research infrastructure.\n- Experience with RTL, Verilog/SystemVerilog, EDA tools, formal verification, or chip-design automation.\n\nTo comply with U.S. export control laws and regulations, candidates for this role may need to meet certain legal status requirements as provided in those laws and regulations.\n\nAbout OpenAI\n\nOpenAI is an AI research and deployment company dedicated to ensuring that general-purpose artificial intelligence benefits all of humanity. We push the boundaries of the capabilities of AI systems and seek to safely deploy them to the world through our products. AI is an extremely powerful tool that must be created with safety and human needs at its core, and to achieve our mission, we must encompass and value the many different perspectives, voices, and experiences that form the full spectrum of humanity.\n\nWe are an equal opportunity employer, and we do not discriminate on the basis of race, religion, color, national origin, sex, sexual orientation, age, veteran status, disability, genetic information, or other applicable legally protected characteristic.\n\nFor additional information, please see OpenAI’s Affirmative Action and Equal Employment Opportunity Policy Statement.\n\nBackground checks for applicants will be administered in accordance with applicable law, and qualified applicants with arrest or conviction records will be considered for employment consistent with those laws, including the San Francisco Fair Chance Ordinance, the Los Angeles County Fair Chance Ordinance for Employers, and the California Fair Chance Act, for US-based candidates. For unincorporated Los Angeles County workers: we reasonably believe that criminal history may have a direct, adverse and negative relationship with the following job duties, potentially resulting in the withdrawal of a conditional offer of employment: protect computer hardware entrusted to you from theft, loss or damage; return all computer hardware in your possession (including the data contained therein) upon termination of employment or end of assignment; and maintain the confidentiality of proprietary, confidential, and non-public information. In addition, job duties require access to secure and protected information technology systems and related data security obligations.\n\nTo notify OpenAI that you believe this job posting is non-compliant, please submit a report through this form. No response will be provided to inquiries unrelated to job posting compliance.\n\nWe are committed to providing reasonable accommodations to applicants with disabilities, and requests can be made via this link.\n\nOpenAI Global Applicant Privacy Policy\n\nAt OpenAI, we believe artificial intelligence has the potential to help people solve immense global challenges, and we want the upside of AI to be widely shared. Join us in shaping the future of technology.", "url": "https://wpnews.pro/news/research-engineer-ai-for-chip-design-openai", "canonical_source": "https://frontierroles.com/jobs/openai-research-engineer-ai-for-chip-design-ed1a2b/", "published_at": "2026-09-11 23:38:19+00:00", "updated_at": "2026-09-12 03:57:37.975411+00:00", "lang": "en", "topics": ["ai-research", "ai-chips", "ai-agents", "ai-tools"], "entities": ["OpenAI", "San Francisco", "RTL", "Verilog", "SystemVerilog", "EDA"], "alternates": {"html": "https://wpnews.pro/news/research-engineer-ai-for-chip-design-openai", "markdown": "https://wpnews.pro/news/research-engineer-ai-for-chip-design-openai.md", "text": "https://wpnews.pro/news/research-engineer-ai-for-chip-design-openai.txt", "jsonld": "https://wpnews.pro/news/research-engineer-ai-for-chip-design-openai.jsonld"}}