{"slug": "nvidia-spectrum-x-ethernet-multiplane-network-architecture-at-hot-chips-2026", "title": "NVIDIA Spectrum-X Ethernet Multiplane Network Architecture at Hot Chips 2026", "summary": "NVIDIA presented its Spectrum-X Ethernet Multiplane Network Architecture at Hot Chips 2026, claiming 1.9x higher training performance in multi-tenant AI factories and detailing a roadmap to scale AI factory networking from thousands of GPUs toward half a million. The architecture divides AI factories into five purpose-built networks, with Spectrum-X delivering 1.6x higher RDMA bandwidth, 2.2x better multi-tenancy, and 1.3x lower bandwidth jitter around 102.4T switch systems and 1.6T SuperNICs. NVIDIA also highlighted production co-packaged optics with 4x fewer lasers and 10x lower mean time between interruptions.", "body_md": "NVIDIA is presenting the Spectrum-X Ethernet Multiplane Network Architecture here at Hot Chips 2026. This talk explains how NVIDIA plans to scale AI factory networking from thousands of GPUs toward half a million.\n\nThis article is being written live from the presentation, so please excuse any typos.\n\n## NVIDIA Spectrum-X Ethernet Multiplane Network Architecture at Hot Chips 2026\n\nNVIDIA is showing the same slide for the 4th time at Hot Chips 2026. I think it is done for framing Agentic AI, but it is also the 4th time (at least) we have seen this.\n\nAgain, we get another look at the AI Factory platform. Gilad is saying this is because this is what NVIDIA is building.\n\nHere NVIDIA divides the AI factory into five purpose-built networks: scale-across, scale-in, scale-out, scale-up, and the AI context scale. That scale-in is the new one today, and it was a bit awkward watching [Broadcom’s Thor Ultra](https://www.servethehome.com/broadcom-thor-ultra-ethernet-nic-at-hot-chips-2026/) presentation today knowing that scale-in was going to become a thing in the subsequent presentation. A single general-purpose fabric cannot serve all of these well, and that is the load-bearing claim behind the rest of the talk.\n\nA quick comment that [NVIDIA co-packaged optics](https://www.servethehome.com/nvidia-co-packaged-optics-with-silcion-photonics-for-switching-and-spectrum-xgs-scale-across/) solutions are in production. We are also talking about why NVIDIA needs Astra, scale-in, and [BlueField-4](https://www.servethehome.com/nvidia-bluefield-4-processor-at-hot-chips-2026/).\n\nNVIDIA’s scale-up networking runs on NVLink. NVLink’s NVL72 rack pairs an NVLink spine with switch trays to form a 72-GPU scale-up domain, which NVIDIA credits with leading tokens per megawatt.\n\nEnterprise, hyperscale, and service provider networks each have their own spine designs, and NVIDIA argues that AI factories need a purpose-built Ethernet rather than reusing general-purpose topologies.\n\nSpectrum-X is NVIDIA’s giga-scale answer for scale-out Ethernet. NVIDIA claims 1.6x higher RDMA bandwidth, 2.2x better multi-tenancy, and 1.3x lower bandwidth jitter around 102.4T switch systems and 1.6T SuperNICs. Our earlier look at the MRC RDMA transport protocol digs into the transport underneath Spectrum-X. NVIDIA is focused on solving jitter not just with a single device but with an entire end-to-end system.\n\nNVIDIA’s headline here is 1.9x higher training performance in a multi-tenant AI factory, drawn from a DeepSeek V3 multi-job training run. In that noisy shared environment, step times for off-the-shelf Ethernet climb well above the Spectrum-X curves, with the gap widening across the 80-plus steps shown. NVIDIA attributes the separation to low-jitter communications and tenant noise isolation.\n\nExtreme co-design is most evident in NCCL performance. For the main NCCL operations in Nemotron Ultra pre-training, gradient all-reduce leads at 14x, token dispatch sits at 3.5x, and both gradient reduce-scatter and parallel matrix multiply land at 2x, all relative to off-the-shelf Ethernet.\n\nScale-out AI leans on optics to a degree traditional clouds do not. NVIDIA puts the optical share in an AI factory at 10% of the compute power, well above what a conventional cloud data center typically carries.\n\nSpectrum-X Ethernet photonics is the production play behind that. NVIDIA has a co-packaged optics chip with micro ring modulators in production and a 3D-stacked silicon photonics engine on the TSMC Coupe process, and it claims 4x fewer lasers, lower power, and 10x lower mean time between interruptions.\n\n“100G SerDes is last year’s stuff” just after Broadcom presents 100G SerDes Thor Ultra at Hot Chips. Awesome.\n\nHere is the chip:\n\nToday’s hyperscale cloud commonly starts from a top-of-rack switch topology. This 2k-scale baseline is the conventional layout NVIDIA wants to move beyond for AI factories.\n\nMulti-rail is the first step up. NVIDIA shows 8k Rubin GPUs at 1.6T per-GPU scale-out bandwidth, with 100T switches carrying 64 1.6T ports and splitting traffic across four rails. In multi-rail, the full bandwidth of the NIC goes to the switch port.\n\nNow NVIDIA introduces the multiplane topology. Multiplane separates the fabric into planes that can share switch hardware, rather than dedicating full rails, and that is the core idea of this talk. This is where the NIC connects to multiple switches. Instead of 1.6Tbps to one switch, this is 8x 200Gbps, with each link going to a different switch.\n\nMultiplane extends AI factory scale by 64x over multi-rail. NVIDIA lands at 512k Rubin GPUs, still at 1.6T scale-out bandwidth per GPU, using 100T switches with 512 ports of 200G laid out as eight planes across four rails.\n\nMultiplane also trims the physical footprint. NVIDIA claims 1.7x fewer scale-out switches than a traditional multi-tier single-rail topology, reducing power, rack space, and costs.\n\nFault behavior is where multiplane is meant to pay off. Under partial bandwidth loss, the Spectrum-X multiplane topology holds 90% bandwidth with a 2.68ms detection time, while a traditional multi-tier topology drops to 0% bandwidth.\n\nNVIDIA converts that into a 1.6x goodput advantage over off-the-shelf Ethernet multiplane. Spectrum-X detects faults in 2.68ms, roughly 400x faster, and recovers in 100ms, about 11x faster, holding 90% bandwidth, whereas the OTS topology suffers full bandwidth loss with 1080ms detection and recovery.\n\nSpectrum-XGS reaches across multiple AI factories. With 800Gb/s per port on 102.4Tb/s switches and ConnectX-9 SuperNICs, NVIDIA claims up to 1.9x lower multi-site latency and doubled scale-across performance for distributed AI operations.\n\nNVLink Fusion brings third-party XPUs onto the NVIDIA AI platform. NVIDIA shows 3.6 TB/s all-to-all bandwidth per XPU connecting 72 XPUs in a single domain, wrapped in a cableless MGX rack rated for 45C inlet and 100% liquid cooling, with 3x lower latency.\n\nSoftware must keep pace with that hardware. DSX is NVIDIA’s AI factory platform, spanning power optimization and infrastructure software plus platform software across DSX OS, DSX Sim, DSX MaxLPS, and DSX Flex.\n\nNVIDIA argues AI factories need simulation and validation at scale before construction. This is more important when you have increasingly large network topologies because you also need to understand the cabling needs.\n\nDSX Air compresses that deployment timeline from months to days. NVIDIA shows infrastructure bring-up falling from six months to one week, infrastructure software from three months to one week, and deployment from two weeks to one day.\n\nNVIDIA closes with the five networking infrastructures of the AI factory. Scale-in, scale-up, scale-out, scale-across, and context scale each get purpose-built silicon, and the figure piles on multipliers from 18x down across bandwidth, packet rate, latency, and jitter.\n\nEvery networking dimension shown here is purpose-built and co-designed with the platform rather than borrowed from a general-purpose fabric. That is the through-line of the entire talk.\n\n## Final Words\n\nNVIDIA is making the argument that Ethernet can handle AI factory scale-out, but only when the hardware is designed specifically for AI. This multiplane topology is the headline, expanding the addressable scale from 8k GPUs to 512k GPUs while claiming fewer switches and better fault behavior. Whether those figures hold in live deployments is the real test, and the rest of Hot Chips should show how the Vera Rubin software-and-optics story comes together.", "url": "https://wpnews.pro/news/nvidia-spectrum-x-ethernet-multiplane-network-architecture-at-hot-chips-2026", "canonical_source": "https://www.servethehome.com/nvidia-spectrum-x-ethernet-multiplane-network-architecture-at-hot-chips-2026/", "published_at": "2026-08-25 19:21:08+00:00", "updated_at": "2026-08-25 19:44:42.828912+00:00", "lang": "en", "topics": ["ai-infrastructure", "ai-chips", "ai-products"], "entities": ["NVIDIA", "Spectrum-X", "Hot Chips 2026", "Broadcom", "Thor Ultra", "BlueField-4", "NVLink", "TSMC"], "alternates": {"html": "https://wpnews.pro/news/nvidia-spectrum-x-ethernet-multiplane-network-architecture-at-hot-chips-2026", "markdown": "https://wpnews.pro/news/nvidia-spectrum-x-ethernet-multiplane-network-architecture-at-hot-chips-2026.md", "text": "https://wpnews.pro/news/nvidia-spectrum-x-ethernet-multiplane-network-architecture-at-hot-chips-2026.txt", "jsonld": "https://wpnews.pro/news/nvidia-spectrum-x-ethernet-multiplane-network-architecture-at-hot-chips-2026.jsonld"}}