Nvidia is putting its Vera CPUs to work alongside AI agents to speed up chip design
Nvidia Corp. says it’s now running the chip design software its engineers are using to design the next generation of its graphics processing units, on its own silicon. It’s partnering with Cadence Systems Inc. and Synopsys Inc., the two biggest providers of electronic design automation or EDS software, which are now optimizing their platforms to run on Nvidia’s Vera central processing units to accelerate chip design workloads.
The chipmaker said that Cadence’s Jasper, a formal verification platform, and Synopsys VCS, a logical simulation tool that’s used to validate chip designs before fabrication, improved their performance by 1.5-times when running on Vera central processing units.
The announcement came as Nvidia revealed that it’s also integrating its PhysicsNeMo physics-AI libraries and a set of GPU math libraries into the Nvidia Agent Toolkit, as part of a push to increase the role of autonomous artificial intelligence agents in the chipmaking process. AI agents can now call accelerated solvers in the same way as they use any other third-party tool, Nvidia said at the 2026 Design Automation Conference in Long Beach, California, today.
Accelerating EDA workloads
Nvidia is trying to accelerate the pace of chip development by speeding up EDA workloads while increasing automation in various parts of the design process. The chipmaker explained that simulation, verification and implementation are all crucial steps in the semiconductor design process. Traditionally, these steps have always been performed by human engineers, and they are painstaking processes. It’s not uncommon for engineers to spend years validating behavior, identifying problems and refining designs through thousands of iterations before they settle on a final blueprint for a new generation semiconductor.
Nvidia has been looking to accelerate these processes for years, but while GPUs and AI have helped in some areas, many aspects of EDA are heavily dependent on CPU performance. For instance, things like logic simulation, formal verification and some parts of digital implementation are reliant on fast individual cores, efficient memory systems and rapid overall throughput. These qualities are best provided by CPU architectures, which means they continue to play a vital role in validating new chip designs and exploring alternatives.
By optimizing the Vera CPUs for EDA workloads, Nvidia says it has shown it can accelerate two of the most compute-intensive aspects of the early chip design lifecycle. Cadence Jasper is a verification platform that uses smart proof technology and machine learning algorithms to identify and fix bugs and accelerate productivity, while Synopsys VCS is used to simulate and validate complex chip designs before they’re built. In Nvidia’s early tests, it showed it was able to increase the performance of both applications by 1.5-times.
The chipmaker said it’s going to work with Cadence and Synopsys to optimize other EDA workflows on Vera, and ultimately hopes to accelerate the design of its successor, codenamed the Rosa CPU, which will be powered by the next-generation Nvidia Rigel core.
Automating chip design
Nvidia is creating a kind of continuous feedback loop, where its current generation Vera CPUs speed up the development of future generations, but that’s not all it’s doing. By adding the PhysicsNeMo and CUDA-X libraries to the Nvidia Agent Toolkit, it’s also stepping up agentic involvement in the chip design process.
Creating more sophisticated chips requires engineers to connect physics, simulations and performance analysis across increasingly complex design cycles. This kind of work is perfect for autonomous AI engineers, which can run simulations to generate high-fidelity data at much greater speeds than humans can. With today’s update, PhysicsNeMo and CUDA-X become agent-ready tools that can facilitate these simulations. PhysicsNeMo gives agents the physics skills needed to train and deploy AI models, while the CUDA-X libraries bring accelerated solvers and quantum chemistry capabilities into agentic engineering workflows.
In addition, Nvidia said it’s updating the CUDA-X libraries to support “iterative sparse solvers” on its GPUs for the first time. This refers to the sparse linear algebra arithmetic that underpins physical simulations ranging from fluid flow to structural stress to electromagnetics. The new libraries announced today include cuISS for iterative solvers, cuDSS for direct sparse solvers that are used in circuit and device simulation, and cuEST for the quantum-chemistry simulations that predict how materials behave at atomic scales.
Nvidia said that its partners have already seen extremely encouraging results with the new libraries. For instance, the design, test and emulation software firm Keysight Technologies Inc. said it has been able to speed up electromagnetic simulations by up to 10-times using the new cuDSS libraries, while the EDA software firm Silvaco Group Inc. was able to run a 3.2-billion-mesh-node photonic edge coupler simulation in under four hours on a cluster of 32 GPUs. According to Nvidia, no CPU-based simulation would be able to match this performance.
The chipmaker also talked about how Cadence’s AuraStack AI Super Agent, designed to automate printed circuit boards and advanced packaging workloads, now runs on cuDSS on its Millenium M2000 supercomputer. Cadence said it has seen design verification workflows increase by 15-times as a result of this change – an especially encouraging figure, considering that verification workloads across the chip design industry consume billions of compute hours annually.
All of this software is being made freely available to chip designers. PhysicsNeMo is available under the Apache 2.0 license, while the new CUDA-X libraries are free, drop-in replacements for the handcrafted code that engineers would normally have to write for themselves. For Nvidia this makes perfect sense, for PhysicsNeMo and CUDA-X can only run on its own silicon.
“Engineering has reached an inflection point. AI can now work with tools of physics, simulation and design,” said Nvidia Vice President and General Manager of Computational Engineering. “With Nvidia Agent Toolkit, developers can build agentic engineers that reason using physics, run simulations and generate high-fidelity data to become a new engine for innovation in chip and system design.”
Image: Nvidia
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