Marvell Targets AI Bottlenecks with Memory-Disaggregation Portfolio

Marvell Technology Inc. introduced a memory-disaggregation portfolio targeting AI infrastructure bottlenecks, including the Bravera SC6 PCIe 6.0 SSD controller, the Structera CXL family, and Photonic Fabric components. Khurram Malik, associate VP of product marketing, said the products aim to give cloud providers more flexibility in sourcing, scaling, and allocating memory for AI workloads, with Structera X compression delivering 2 to 2.5x effective memory capacity. The portfolio addresses server-attached storage, rack-scale memory expansion, and multi-rack shared memory, with Meta already using CXL-based memory expansion across millions of servers.

Marvell Technology’s latest memory infrastructure products aim to help hyperscale and cloud customers move memory closer to the point of computation, reduce data bottlenecks, and improve token efficiency for inference workloads. In a briefing with EE Times, Khurram Malik, associate VP product marketing, said the rollout spans three “swim lanes,” all of which are part of the same memory-disaggregation strategy. The portfolio includes Marvell’s Bravera SC6 PCIe 6.0 SSD controller, the Structera CXL family for memory expansion and pooling, and the company’s Photonic Fabric components for optical shared-memory architectures. Malik said the goal is to give cloud providers more flexibility in how they source, scale, and allocate memory across increasingly demanding AI workloads. Together, these products address three levels of the AI infrastructure stack: server-attached storage, rack-scale memory expansion and pooling, and shared memory distributed across multiple racks, he said. Enabling better NAND control Bravera SC6 is intended to support server-level AI storage use cases, including key-value cache, where keeping more data on SSD can improve infrastructure efficiency, a trend Malik said customers are already adopting. View All https://www.eetimes.com/category/sponsored-content/ He said the Bravera SC6 controller’s appeal to hyperscalers is its support across NAND suppliers https://www.embedded.com/esmts-complete-memory-portfolio-selection-most-suitable-for-embedded-industrial-automotive-customers/ , giving customers flexibility at a time when supply constraints influence purchasing decisions. The Bravera SC6 controller also reflects the way hyperscalers increasingly want to tune storage behavior to workload needs, Malik said. It is built around a host-managed flash translation layer, allowing customers to better control write amplification, garbage collection, and wear leveling. “End customers know their workloads,” he said. “They write on the NAND based off of their workload and they manage the write amplification, which turns into the endurance of the SSDs.” Pooling memory for AI workloads The advent of the Compute Express Link CXL protocol predates the recent AI boom, but it is quickly becoming a key enabler of AI infrastructure https://www.eetimes.com/cxl-adds-port-bundling-to-quench-ai-thirst/ . Malik said the Structera CXL family for memory expansion and pooling reflects how Marvell sees itself as a broad portfolio player in the emerging CXL market. He said the company’s Structera X memory expansion capabilities allow for the reuse of existing DDR4 or DDR5 capacity, making it a likely first adoption point for hyperscalers looking for quick deployment paths in data centers. “The first and foremost important use case within CXL is the recycling of DDR4.” A high-profile example is Facebook parent company Meta, which is using CXL-based memory expansion across millions of servers, reusing DDR4 modules pulled from decommissioned machines https://www.eetimes.com/meta-cuts-server-count-25-by-reusing-old-memory-can-anyone-else-do-it/ rather than retiring them. Malik said Structera X’s compression capabilities can deliver roughly 2 to 2.5× the effective memory capacity compared with standard approaches. Structera A, meanwhile, is a near-memory compute accelerator built to offload work from CPUs and GPUs, which Malik said is designed for workloads such as recommendation engines, vector search, databases, and HPC. At the rack level, Structera S4 is a CXL 3.1 switch that can support disaggregated memory architectures designed to connect CPUs and GPUs to CXL resources even when native lanes are not present. “We have a protocol conversion layer which converts PCIe over CXL native in the switch,” Malik said. Pushing AI memory beyond the rack Marvell’s Photonic Fabric offering extends the memory-disaggregation idea across multiple racks using optical links. It is designed to improve throughput for models with large memory footprints and long context windows. Malik said it can create a shared-memory tier up to 50 meters away and support up to 32 TB of warm KV cache offload. The company also claims that the Photonic Fabric can deliver two to three times the token throughput within existing data center footprints and power envelopes, although actual gains will depend on workload characteristics and system implementation. The rollout of these products together addresses the shift from treating memory as a fixed, server-local resource, Malik said. By separating memory from compute and connecting storage, CXL devices and optical fabrics across different scales, cloud operators can potentially allocate capacity more dynamically while reducing stranded resources. Malik said Marvell believes the next gains in AI performance will come not only from faster processors, but also from better ways to store, pool, and move memory. “We are in the forefront to enable that disaggregation by working with hyperscalers based on their architecture.” Read also: Samsung Lays Out AI Memory Roadmap https://www.eetimes.com/samsung-lays-out-ai-memory-roadmap/ Renesas Tackles Memory Bottleneck with MRDIMM Update https://www.eetimes.com/renesas-tackles-memory-bottleneck-with-mrdimm-update/ Dynamic AI Demands Drive Memory Diversity https://www.eetimes.com/dynamic-ai-demands-drive-memory-diversity/