# Intel Hot Chips 2026: 256-Core Diamond Rapids, Crescent Island With 480GB for Inference, and Wildcat Lake at the Edge > Source: > Published: 2026-08-24 19:55:39+00:00 At Hot Chips 2026, Intel [presented architectural details](https://newsroom.intel.com/client-computing/intel-outlines-architectures-for-agentic-ai-at-hot-chips-2026) for three upcoming silicon platforms targeted at enterprise agentic AI workloads spanning data center, inference, and edge tiers. The lineup consists of the next-generation Xeon processor, codenamed Diamond Rapids, for workload orchestration; the [Crescent Island](https://www.storagereview.com/news/intel-targets-ai-inference-at-ocp-2025-with-crescent-island-gpu-and-gaudi-3-racks) data center GPU, dedicated to high-density inference; and the Wildcat Lake SoC, branded as Intel Core Series 3, for client and edge devices. According to Intel technical leadership, agentic AI workloads require heterogeneous designs that pair general-purpose compute with dedicated acceleration, advanced packaging, and modular chiplet interconnects. Fabricated on the [Intel Foundry 18A](https://www.storagereview.com/news/intel-launches-xeon-6-on-18a-with-288-e-cores-e835-200gbe-ethernet-and-crescent-island-gpu-details) process node family, Intel says the three platforms are underpinned by Foveros Direct 3D packaging alongside the Universal Chiplet Interconnect Express (UCIe) open standard to meet power, bandwidth, and density requirements across enterprise deployments. ## Diamond Rapids: High-Core-Count Compute and I/O Foundation Built on the performance-enhanced Intel 18A-P process node, Diamond Rapids represents Intel’s next-generation Xeon architecture, engineered to orchestrate agentic workflows and large-scale enterprise computing. The system-on-chip utilizes Foveros Direct 3D stacking and UCIe-S interconnects to bind modular compute tiles with a unified memory subsystem and high-speed I/O. - Up to 256 new cores with 1.28GB LLC - 16 memory channels at 12,800 MT/s - 128 lanes of PCIe Gen6 and CXL 3.0 In terms of silicon execution resources, the platform scales up to 256 physical cores backed by 1.28 GB of Last Level Cache (LLC). Compute enhancements include Intel Advanced Performance Extensions (APX) and updated Advanced Matrix Extensions (AMX) instructions. Memory and bus connectivity see significant generation-over-generation increases: the architecture integrates 16 memory channels supporting data rates up to 12,800 MT/s, alongside 128 lanes of PCIe Gen6 and Compute Express Link (CXL) 3.0 to manage high-throughput accelerator attachment and memory expansion. ## Crescent Island: High-Capacity Air-Cooled Inference Accelerator Crescent Island is a purpose-built PCIe accelerator designed to optimize token throughput and operational economics for real-time inference and long-context agentic models. Built around the Xe3P architecture, the card features 32 Xe cores and 256 Intel Matrix Extension (XMX) engines. - 32 Xe cores and 256 XMX engines based on Xe3P - Up to 480GB LPDDR5X memory - 350-watt air-cooled PCIe card Rather than relying on power-dense High Bandwidth Memory (HBM), Crescent Island integrates up to 480 GB of LPDDR5X memory. This memory architecture allows the accelerator to host large parameter models, support extended context windows, and serve multiple concurrent agents while staying within a 350-watt thermal envelope. The physical design complies with standard PCIe form factors, allowing direct integration into existing air-cooled data center racks without requiring liquid-cooling conversions. ## Wildcat Lake: Client and Edge SoC Integration Positioned for mainstream laptops, lightweight mobile workstations, and intelligent edge appliances, the Intel Core Series 3 processor family, codenamed Wildcat Lake, brings AI execution to client infrastructure. Fabricated on the Intel 18A process, Wildcat Lake marks Intel’s first integration of UCIe packaging into a mainstream client processor, enabling modular, cost-effective silicon assemblies. - 2 performance cores and 4 efficiency cores - Support for up to LPDDR5X-7467 - WiFi 7 and Bluetooth 6.0 The compute topology combines two performance cores and four efficiency cores to handle single-thread and background processing. Graphics and matrix operations are driven by an integrated Xe3 GPU with XMX acceleration, complemented by a dedicated Neural Processing Unit (NPU) rated at up to 17 TOPS for hybrid on-device inferencing. The platform supports up to LPDDR5X-7467 memory and natively integrates Wi-Fi 7 and Bluetooth 6.0 connectivity. Together, the three architectures outline Intel’s strategy to address the computational, memory capacity, and thermal boundaries of agentic AI deployments across data center infrastructure and distributed edge nodes.