Intel at a Memory Crossroads, Again

Intel CEO Lip-Bu Tan signaled a return to memory chip innovation, saying memory is no longer a commodity and that Intel is exploring stacking DRAM on CPUs, amid industry expectations that memory shortages will persist beyond 2030. Tan's comments follow Intel's hiring of former SK Hynix CEO Seok-Hee Lee as executive VP of foundry and advanced packaging, and come after Intel's history of exiting DRAM in 1985, abandoning RDRAM in 2001, shutting down Optane in 2022, and selling its NAND business to SK Hynix for $9 billion in 2020.

Intel, a semiconductor memory pioneer that transformed into a CPU behemoth, is heeding another return to the memory world, which itself has transformed from a highly cyclical commodity business to an AI gold mine. Intel CEO Lip-Bu Tan https://www.eetimes.com/opinion-a-sigh-of-relief-as-lip-bu-tan-is-appointed-ceo-of-intel/ telegraphed this move in the TechSurge podcast hosted by Michael Marks. The crux of Tan’s talks was that memory chips are no longer a commodity and that current memory architectures leave plenty of room for innovation. That’s understandable because AI has profoundly changed the memory chip market. Moreover, industry watchers believe that memory shortages will persist beyond 2030. Tan also hinted at Intel exploring ways to stack memory on top of a CPU. “Intel isn’t just looking at building CPUs with new architectures but is also working on embedding CPUs with stacked DRAM capabilities.” Take the case of Intel’s Lunar Lake platform, which features memory in the same package as the CPU. Industry observers are quick to link Tan’s memory talk to Intel’s recent hiring of SK Hynix’s former CEO, Seok-Hee Lee, as executive VP of the foundry business and advanced packaging technologies. Lee spent a decade at Intel from 2000 to 2010, then went on to lead SK Hynix, where he was instrumental in developing high-bandwidth memory HBM , which now sits alongside every major AI accelerator. View All https://www.eetimes.com/category/sponsored-content/ Despite all this memory teasing and talk of pet projects, Tan didn’t unfold any definitive plan. It’s not even clear whether these pet projects for memory architecture innovation are Intel initiatives or whether they fall under his personal investments through Walden International, the venture capital firm he founded and still chairs. Nevertheless, Tan’s “memory talk” has been making waves across the industry. It has also triggered a trip to memory lane of Intel’s long journey in this industry. Below is a sneak peek at Intel’s love-hate relationship with memory semiconductors spanning half a century. The memory nostalgia When Robert Noyce and Gordon Moore founded Intel in 1968, the company focused heavily on semiconductor memory because, at that time, memory chips were expensive, difficult to manufacture, and dominated by magnetic-core memory. Intel aimed to make memory faster, smaller, and cheaper. Intel launched the first commercial SRAM 3101 in 1969 and later the first commercial DRAM 1103 in 1970. DRAM became a major commercial success, making Intel a leading memory chip company. However, by the early 1980s, NEC, Hitachi, and Fujitsu had built manufacturing operations that produced chips with yields up to 40% higher than U.S. companies, and at costs U.S. chipmakers could not match. Heavy losses from cheaper, higher-yield Japanese memory chips forced Intel to exit DRAM in 1985 and shift its focus to x86 CPUs. However, Intel returned to the memory business in the late 1990s to push RDRAM for the Pentium 4 processor in partnership with Rambus. But RDRAM’s higher cost and latency led the market to favor DDR RAM, and as a result, Intel abandoned this initiative in 2001. Next, Intel began developing Optane—a high-speed hybrid of DRAM and NAND—with Micron in 2012. Optane, based on the 3D XPoint technology, hit the market in 2017, but competing technologies such as HBM https://www.eetimes.com/hbm-innovation-outpaces-standards-development/ and multilayer 3D stacked memory were cheaper and more promising. As a result, Optane https://www.eetimes.com/what-legacy-will-money-losing-optane-have/ never achieved the expected success, and Intel shut it down in 2022. Intel also ventured into 3D NAND flash technology in partnership with Micron. But poor commercial adoption and heavy losses led Intel to sell its NAND business to SK Hynix SK%20hynix%20NAND%20flash%20deal%20and%20a%20brief%20history%20of%20Intel’s%20memory%20business for $9 billion in 2020. “Exiting the memory business at literally the worst possible moment they could do it; Sounds exactly like Intel,” noted a post on Reddit. Another post was even harsher: “Every time Intel decides to join a market, the market is already at its peak. Every time they leave a market, the market is only starting to grow.” Then there was a post calling it “Innovation brought to you by the boardroom.” However, a forum participant noted that Intel’s DRAM business wasn’t profitable in the 1980s, so it bet on the success of the 386 processors. “That was the right call since Intel grew tremendously after that.” So, in the end, it cut both ways. Intel’s XBM and ZAM memory technologies While Tan’s pet projects for memory architecture innovation remain unclear, Intel’s two upcoming memory technology initiatives—cross-batch memory XBM and Z-angle memory ZAM —are in the spotlight. ZAM is currently slated for 2029–2030, while XBM could be unveiled at the start of the next decade. XBM is an ultra-high-bandwidth memory with back-end transistors designed to match HBM4’s physical footprint. It’s a fundamental rethinking of how DRAM is built and connected. An HBM chip connects to its host processor across a silicon interposer, which adds cost, constrains package dimensions, and is currently assembled almost exclusively on TSMC’s Chip-on-Wafer-on-Substrate CoWoS packaging technology. XBM serializes data onto Universal Chiplet Interconnect Express UCIe links instead of routing through an interposer. Furthermore, unlike conventional DRAM, which places its one-transistor, one-capacitor 1T1C memory cells in the front-end silicon layers, XBM moves those cells to the back-end-of-line BEOL , freeing the front-end silicon for more through-silicon vias TSVs . On the other hand, ZAM—a memory architecture Intel is co-developing with Saimemory, a SoftBank subsidiary—uses fusion bonding to assemble a nine-layer stack of largely conventional DRAM with approximately 3-µm-thin silicon between each tier. It’s targeting roughly twice the bandwidth density of HBM4. Intel, which chose logic over memory in 1985, is heading back to its memory roots, and XBM and ZAM initiatives are a testament to this shift. However, while it makes sense given how profoundly AI has changed the memory market, Intel will need more than innovation in memory architectures. For example, it will need infrastructure to manufacture memory chips. Then there is the psychological burden of making several unsuccessful forays in the memory market. More details are likely to emerge about Intel’s memory ambitions in the coming days, and they will establish the Santa Clara, California-based chipmaker’s credentials in the memory business. That will also show how Intel—currently in desperate need of capital for its foundry business and R&D on AI-centric CPUs—will execute this massive undertaking to return to the memory business. See also: Remembering the PROM Knights of Intel https://www.eetimes.com/remembering-the-prom-knights-of-intel/ What Legacy Will Money-Losing Optane Have? https://www.eetimes.com/what-legacy-will-money-losing-optane-have/ SK Hynix NAND Flash Deal and a Brief History of Intel’s Memory Business file:///C:/Users/133599/AppData/Local/Microsoft/Windows/INetCache/Content.Outlook/ZM1JM093/SK%20hynix%20NAND%20flash%20deal%20and%20a%20brief%20history%20of%20Intel’s%20memory%20business