Indian Researchers Look Beyond GPUs to Neuromorphic AI Hardware

Researchers at the Indian Institute of Technology (IIT) Bombay demonstrated an ultra-low-power neuromorphic neuron fabricated in standard GlobalFoundries 45-nm CMOS technology that consumed about 1,000× less power and showed about 5× lower process, voltage, and temperature variability than an equivalent sub-threshold low-power design, according to professor Udayan Ganguly. The team repurposed quantum-tunneling current as the neuron's current source and built a complete neuromorphic speech-recognition system to show the approach extends beyond individual circuits. Alex P. James, director of the Indian Institute of Information Technology and Management-Kerala (IIITM-K), told EE Times that spiking, event-driven computation is needed because scaling energy consumption in proportion to data is "not a sustainable model," citing the human brain's roughly 20 W as a gold standard.

Neuromorphic computing mimics biological brains through sparse, event-driven computation, memory-centric architectures, and asynchronous communication. Indian researchers see it as a way to curb AI’s energy use while enabling new hardware designs. In an exclusive interview with EE Times, Alex P. James, director of the Indian Institute of Information Technology and Management-Kerala IIITM-K , said, “Today, we have a huge amount of data to process. That is not a sustainable model if energy consumption keeps scaling in proportion to the data we have.” Researchers often return to one comparison: the human brain. “If you look at the human brain, we still work with around 20 W, and that can be seen as a gold standard for many of the intelligent tasks we associate with neuromorphic systems,” James said. For decades, semiconductor performance has largely improved by shrinking transistors and increasing processor complexity. This strategy has powered increasingly capable CPUs, GPUs, and AI accelerators but may not be enough to solve AI’s growing energy demands. View All https://www.eetimes.com/category/sponsored-content/ Because neuroscience is an evolving field, researchers are exploring multiple architectural approaches rather than converging on one. “We have not yet fully understood the brain,” James said. “We understand its physiology, but we do not have a complete functional understanding of every aspect of it.” Why spikes matter One concept that appears throughout neuromorphic research is spiking neural networks SNNs . Unlike conventional deep neural networks that continuously perform multiply-and-accumulate MAC operations, spiking systems communicate only when neurons generate events. “The brain does not use its entire capacity all the time,” James said. “Many neurons remain inactive during a given task. As a result, a significant amount of energy is saved because not everything is switched on all the time.” EE Times previously spoke with Indian Institute of Technology IIT Bombay Professor Udayan Ganguly, whose group demonstrated an ultra-low-power neuromorphic neuron by repurposing quantum-tunneling current, a leakage mechanism that conventional chip designers typically seek to suppress. Unlike digital processors, neuromorphic systems do not rely on a global clock and operate asynchronously, encoding information in the timing and pattern of spikes. The artificial neuron follows a similar biological principle: It receives an input that fills a reservoir until it crosses a threshold, generating a spike before resetting itself. Electronically, it can be implemented with a capacitor, current source, leakage resistor, and threshold circuitry. Rather than using conventional transistor operation, the IIT Bombay research team turned to quantum-tunneling current. “In the deep off state, quantum-tunneling current flows,” Ganguly said. “We use that quantum-tunneling current as the current source. That leakage current slowly charges the neuron’s capacitor.” The design was fabricated in standard GlobalFoundries 45-nm CMOS technology, demonstrating that the approach can be implemented using an established manufacturing process. The team said the resulting neuron consumed about 1,000× less power than comparable implementations and showed about 5× lower process, voltage, and temperature variability than an equivalent low-power design based on sub-threshold operation. The same mechanism, Ganguly said, also improved robustness. A speech-recognition system built around spiking neurons To show the concepts could extend beyond individual circuits, Ganguly’s team built a complete neuromorphic speech-recognition system, combining device physics, circuit design, algorithms, and hardware implementation. The demonstration addressed a challenge that conventional pattern-recognition systems must also solve: remembering information that arrives over time. “The system needs memory to retain the earlier sounds so that when a complete sequence has been received, it can recognize the entire pattern,” Ganguly said. The team implemented that capability using a liquid-state machine, a form of recurrent SNN that naturally captures temporal information. “The idea is similar to ripples created when a droplet falls into water,” Ganguly said. “Those ripples gradually fade away, providing a temporary memory of the event.” Speech signals are converted into spike trains, and the recurrent connections preserve enough information to classify complete words. Unlike many deep-learning models that require multiple processing stages, the liquid-state machine performs recognition using only two layers. Using a standard benchmark dataset, the system achieved approximately 99% classification accuracy with only about 100 neurons, showing how small spiking networks can perform practical AI tasks. The same network, Ganguly said, can also be adapted for vision and other applications. The team also fabricated the hardware, demonstrating an end-to-end signal chain. “GlobalFoundries provided us with a free tape-out through its university program, and we were the first university in India to participate in that program,” Ganguly said. The complete system consisted of three stages. “The first stage implements the filters and the artificial ear,” Ganguly said. “The second stage is the recurrent neural network. The third stage performs classification.” The chip’s recurrent neural network contains 36 neurons that generate output spike patterns from spike trains entering the chip over time. When tested on two-class speech-recognition tasks such as “yes” and “no” or “start” and “stop,” the complete hardware system achieved an error rate of less than 2%. “We began by looking at the power consumed by data centers,” Ganguly said. “Modern processors generate substantial heat, but we do not observe the human brain heating up in the same way.” The fabricated neuron operates at approximately 100 kHz, occupies about 40 µm<sup 2</sup , consumes 2.70 pW of standby power, and requires roughly 8 fJ per spike, which is “close to that of the human brain,” Ganguly said. Memory moves to the center of computing SNNs aren’t the only neuromorphic architecture. James pointed to cellular neural networks, hierarchical temporal memory systems, and other biologically inspired models, each emphasizing different brain-like properties such as robustness and fault tolerance. Another direction focuses on memory itself rather than neuron models. Researchers at the Indian Institute of Science IISc Bangalore, led by Professors Sreetosh Goswami and Navakanta Bhat, recently demonstrated a molecular memristor based on a ruthenium compound that delivers 14-bit analog resolution and 4.10-TOPS/W energy efficiency. The device is intended for in-memory computing, where matrix operations are performed directly inside memory arrays rather than repeatedly shuttling data between memory and processors. James said he believes future AI hardware may rely less on arithmetic units and more on memory itself. He pointed to analog, memory-centric architectures that store programmable conductance values instead of binary states—weights encoded directly, letting MAC operations happen naturally within crossbar arrays. “A 32-bit multiplication in a digital system may require hundreds of gates,” James said. “The same operation can be performed using only a few memory devices.” The IISc work follows the same principle. Instead of storing binary values, the molecular memristor stores analog conductance states that represent neural network weights. When input voltages are applied across crossbar arrays, multiplication occurs through Ohm’s law, while the accumulation follows Kirchhoff’s current law, allowing thousands of MAC operations to be executed simultaneously. Such architectures cut chip area and energy consumption, though they add new ADC, precision, and variability challenges. Goswami and Bhat said they addressed one of those precision challenges by engineering the switching mechanism at the molecular level. Unlike many resistive memories that rely on stochastic defect formation, the ruthenium-based device switches through a deterministic molecular process that enables linear, symmetric conductance updates across four orders of magnitude. Sparsity plays a similar role. “In a spiking system, information is represented by ones and zeros,” James said. “If one of the inputs is zero, the multiplication result is zero.” Inactive neurons are simply skipped, consuming little or no energy and lowering computational overhead. The IISc team is now integrating the devices into a mixed-signal AI inference accelerator under development in a 22-nm TSMC process through a startup incubated at the Centre for Nano Science and Engineering. The prototype will use crossbar arrays for in-memory computation while combining analog computing with digital control logic. Commercial success depends on applications Despite decades of research, neuromorphic computing has yet to achieve widespread commercial adoption. James believes the challenge is not simply technical but also about demonstrating clear business value. “For any technology to move from an idea to the market, you need science, engineering, and business,” he said. “The business aspect is particularly important because it is tied to applications.” Researchers first need to prove that neuromorphic architecture solves a real-world problem better than conventional hardware. “For each architecture, we need proof-of-concept demonstrations that show a clear advantage in a real application,” James said. Only then can engineering turn those concepts into manufacturable products. James cautioned that a biologically inspired algorithm doesn’t automatically translate into an efficient chip. Some algorithms may suit analog/mixed-signal hardware; others may be better-suited to in-memory computing or entirely new device technologies. “We are not focused on a single hardware platform,” he said. “We are exploring and identifying the most efficient hardware for implementing these ideas.” Ultimately, economics has the final say. An interdisciplinary challenge Both researchers emphasized that neuromorphic computing extends far beyond semiconductor design, forcing traditionally separate disciplines to work together. “A computer scientist may not interact closely with an electronics engineer,” James said. “A neuroscientist may not interact with either group. Neuromorphic computing is changing that. You will find biologists, mathematicians, electrical engineers, and computer scientists working together to understand the same problem. “If this direction continues, I believe we will eventually solve one of the biggest scientific and engineering challenges of our time,” he added. For Ganguly, the ambition reaches even further. “If we can build chips with neurons and synapses that communicate natively in the same way as the brain, then damaged parts of the brain could potentially be replaced,” he said. “We could model the human brain and better understand thoughts and emotions.” He acknowledged that such applications remain decades away: “That is a 20-year vision. It is not something we are doing today, but it is something that could affect all of us in the future.” For now, neuromorphic computing remains an active research area rather than a GPU replacement. The approaches being explored differ widely. IIT Bombay is developing ultra-low-power spiking neurons using quantum-tunneling current in conventional CMOS technology. IISc Bangalore is engineering molecular memristors for analog in-memory computing. Individual researchers such as IIITM-K’s James are investigating the architectures that determine how those devices should be organized. For India, these projects collectively illustrate that neuromorphic computing is advancing simultaneously at the device, circuit, architecture, and system levels. As power and scalability limits grow harder to ignore, researchers see brain-inspired computing as one of the more promising paths toward next-generation intelligent machines. Also read: Indian Researchers Develop Molecular Memristor for Neuromorphic Computing https://www.eetimes.com/indian-researchers-develop-molecular-memristor-for-neuromorphic-computing/ Neuromorphic Photonic Computing: Lights On https://www.eetimes.com/neuromorphic-photonic-computing-lights-on/ Insect-Inspired Neuromorphic Sensor Targets Physical AI https://www.eetimes.com/neuromorphic-insect-eye-for-physical-ai/ Do Spikes Need Common Language for Sensing and Learning? https://www.eetimes.com/podcasts/do-spikes-need-common-language-for-sensing-and-learning/