# IBM’s 2nm Dual-Architecture Mainframe Processor Runs Arm and IBM Z Instructions in the Same Cores > Source: > Published: 2026-08-24 18:21:58+00:00 At the Hot Chips conference, IBM revealed the [industry’s first dual-architecture mainframe processor](https://newsroom.ibm.com/2026-08-24-ibm-unveils-next-generation-dual-architecture-processor-for-ibm-z-and-linuxone), engineered for future generations of [IBM Z and LinuxONE](https://www.storagereview.com/news/ibm-expands-z17-and-linuxone-5-portfolio-with-rack-mount-systems-and-new-management-software) enterprise systems. Developed through the joint collaboration between IBM and Arm in April 2026, the processor will allow organizations to run Arm-native Linux operating environments alongside traditional z/OS and Linux on IBM Z workloads within the same physical footprint. The unified design is aimed at enterprise data centers seeking to tap into the modern Arm software catalog, including cloud-native frameworks and AI development tools, without sacrificing the resilience of mainframe infrastructure. Arm workloads will inherit IBM’s foundational platform features, such as hardware-level fault detection and automated recovery, advanced cryptography, secure key management, and [integrated AI acceleration](https://www.storagereview.com/news/ibm-spyre-accelerator-low-latency-inference-for-generative-and-agentic-ai-on-ibm-z-linuxone-and-power) for data-intensive transaction processing. ## 2nm Silicon Architecture and Concurrent Core Design Fabricated on an advanced 2-nanometer process node, the new chip features 11 high-performance compute cores capable of clock speeds exceeding 5.7 GHz. The layout is backed by a substantial on-chip cache architecture, integrated AI inference accelerators geared toward real-time fraud detection during transaction processing, and a dedicated on-die Data Processing Unit (DPU) to handle high-bandwidth I/O offload. Unlike hybrid processors that physically isolate distinct core types onto separate regions of silicon, IBM has architected each core to handle multiple instruction sets concurrently. Individual processor cores natively execute both Arm and IBM Z or Arm and LinuxONE instructions simultaneously. This approach allows organizations to scale systems to hundreds of dual-architecture cores and tens of terabytes of memory while maintaining strict platform availability and hardware-enforced cryptographic security boundaries. ## What IBM and Arm Say It Signals Christian Jacobi, CTO and IBM Fellow at IBM Systems Development, noted that the integration of native Arm support represents a substantial architectural shift for IBM Z and LinuxONE. He emphasized that the platform provides enterprise users with direct access to a rapidly expanding developer ecosystem while preserving the established reliability standards required by mission-critical environments. From the silicon perspective, Mohamed Awad, Executive Vice President of Cloud AI at Arm, pointed out that Arm architectures are seeing accelerating enterprise adoption across AI and cloud deployments. He highlighted that integrating the Arm compute architecture directly into high-availability mainframes expands the deployment surface for heavily regulated, mission-critical AI workloads. By eliminating the operational boundary between legacy mainframe applications and modern Arm-native software, IBM and Arm aim to simplify workload consolidation, broaden the flexibility of enterprise software, and preserve strict SLAs across core financial, transactional, and cloud-native systems.