# Google in Talks with Samsung to Make Chip Component

> Source: <https://letsdatascience.com/news/google-in-talks-with-samsung-to-make-chip-component-eaa461b6>
> Published: 2026-06-11 17:49:45.397418+00:00

# Google in Talks with Samsung to Make Chip Component

The Information reported that Alphabet's Google is discussing with **Samsung Electronics** to manufacture a component of its next-generation AI tensor processing unit, codenamed Icefish, Reuters reported on June 11, 2026. According to the report cited by Reuters, **TSMC** would make the main compute die while Samsung would produce a component that links the compute die to memory using 2-nanometer process technology. The Information said Google is working with **MediaTek** on the design and that mass production could be possible as early as **2028**. Reuters noted it could not independently verify the report; Samsung declined to comment and Alphabet did not immediately respond, per Reuters. The story follows recent reporting that Google has also discussed additional manufacturing with **Intel**, and sits alongside Samsung's recent win to make AI chips for **Tesla**, Reuters added.

### What happened

The Information reported that Alphabet's Google is in talks with **Samsung Electronics** to manufacture part of its next-generation AI tensor processing unit, codenamed Icefish, Reuters reported on June 11, 2026. Reuters, citing The Information and two people familiar with the matter, said **TSMC** would make the main compute portion while Samsung would produce a component that connects the compute die to memory using 2-nanometer process technology. The Information, via Reuters, also reported that Google is working with **MediaTek** on chip design and that mass production could be possible as early as **2028**. Reuters said it could not independently verify the report; Samsung declined to comment and Alphabet did not immediately respond.

### Technical details

Per reporting in The Information and Reuters, the work is split between a main compute die (assigned to **TSMC**) and a memory-interface or interposer-like component slated for Samsung's 2-nanometer nodes. The story frames this as a multi-vendor manufacturing approach rather than a single-foundry build. Reuters also referenced earlier coverage that Google has discussed producing TPUs with **Intel** and has recently released new internal chips for training and inference.

### Editorial analysis

Companies building custom AI accelerators routinely split complex designs across multiple foundries and fabs to manage capacity, mix process-node strengths, and diversify supply risk. Using a specialist foundry for the main compute die while using another for a memory-interface component aligns with patterns seen in high-performance chip supply chains.

### Context and significance

Diversifying manufacturing partners matters because foundry capacity constraints at leading nodes have become a material bottleneck for the AI hardware supply chain. Samsung securing a role on a Google TPU program would mark a notable commercial win for Samsung's contract-manufacturing push at advanced nodes, following Reuters reporting that Samsung won a Tesla order and is considering a second Texas plant to expand 2-nanometer capacity.

### What to watch

For practitioners: follow verification and vendor confirmations, any published technical disclosures about Icefish partitioning, and capacity-timeline signals from Samsung, TSMC, and Intel. Also watch for supply agreements or public statements that clarify which die functions each foundry will deliver and whether mass production targets near **2028** hold.

## Scoring Rationale

The story matters to ML infrastructure teams because it signals potential diversification of advanced-node TPU manufacturing, which affects supply capacity and procurement planning. The report is notable but not definitive: it is based on reporting rather than confirmed vendor announcements.

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