GetMOBILE article on benchmarking micro-NPUs now out

Josh Millar of Imperial College London led an article published in GetMobile benchmarking micro-NPUs, ultra-low-power neural network accelerators found in low-cost chips such as ESP32-based boards and ARM systems. The article summarizes a 2025 paper that analyzes tradeoffs among these accelerators, including supported operations, memory, and CPU power, to help developers choose suitable hardware.

https://dl.acm.org/doi/pdf/10.1145/3833428.3833430 Josh Millar https://profiles.imperial.ac.uk/joshua.millar22 lead an article just out in GETMOBILE https://www.sigmobile.org/pubs/getmobile/ on our work from last year on benchmarking micro-NPUs https://anil.recoil.org/papers/2025-npu-bench to help make sense of the growing number of dedicated, ultra-low-power 'neural network accelerators'. There are lots of hidden embedded NPUs in modern low-cost chips, ranging from ESP32 https://www.espressif.com/en/products/socs/esp32 -based boards over to ARM https://arm.com ones. All of these have quite a variety of tradeoffs, from the operations supported which affects which models can be run on them to the amount of memory and CPU power. If you'd like a shorter, more accessible summary of that paper, then head over https://dl.acm.org/doi/pdf/10.1145/3833428.3833430 to read our article. Feedback is most welcome While the hardware landscape hasn't changed hugely since last year's article, the software one has. I'm now finding that using coding agents to write low-level embedded code is far far faster than before. Modern harnesses are pretty good at figuring out the various quirks of each cross-compilation and embedded environment...