Eliyan launches NuLink-XD after January $50 million strategic raise

Eliyan, led by founder Ramin Farjadrad, launched NuLink-XD on July 24, 2026, a 224G PAM4 SerDes architecture for AI scale-up interconnects, following a $50 million strategic investment round disclosed on January 28 from AMD, Arm, Coherent, Meta, Samsung Catalyst Fund, and Intel Capital. The financing, which valued Eliyan at $961.81 million post-money, supports manufacturing and qualification of next-generation interconnect IP and chiplet products aimed at solving data movement bottlenecks in AI systems.

Ramin Farjadrad https://eliyan.com/media-kit/Bios/Eliyan%20Bios.pdf?ref=runtimewire 's Eliyan https://eliyan.com/?ref=runtimewire introduced NuLink-XD https://eliyan.com/press-release/eliyan-introduces-nulink-xd/?ref=runtimewire on July 24, 2026, a 224G PAM4 SerDes architecture for chip-to-chip and chip-to-module AI scale-up interconnects. The launch follows Eliyan's January 28 disclosure of $50 million in strategic investments from AMD, Arm, Coherent, Meta, Samsung Catalyst Fund and Intel Capital, capital Eliyan said would support manufacturing and qualification of next-generation interconnect IP and chiplet products. Forge lists the January 28 Series C tranches https://forgeglobal.com/eliyan stock/?ref=runtimewire at a $961.81 million post-money valuation, below $1 billion. The financing backs Eliyan's bet that data-center systems will be assembled from more specialized dies and require faster links among them. Eliyan's NuLink physical-layer IP https://eliyan.com/technology/?ref=runtimewire connects chiplets inside a package and packaged devices across a system. Farjadrad is an interconnect engineer with an electrical engineering Ph.D. from Stanford and more than 130 granted or pending patents, according to Eliyan's founder biographies https://eliyan.com/media-kit/Bios/Eliyan%20Bios.pdf?ref=runtimewire . He previously co-founded Velio Communications and Aquantia. Aquantia went public in 2017 and was later acquired by Marvell, where Farjadrad served as chief technology officer /article/rob-witoff-joins-coinbase-as-cto and vice president of networking. That history matters because Eliyan is selling technology that must survive a long, expensive path through chip design, manufacturing, packaging, qualification and deployment. A clever circuit is only the starting point. Customers need proven silicon, compatibility with industry standards and confidence that the supplier will still be supporting the design when systems enter production. AI's data movement problem The AI infrastructure market has concentrated enormous spending on accelerators, yet adding compute does little when processors cannot retrieve data from memory or exchange it with neighboring chips quickly enough. Bandwidth, latency and power consumption across those links increasingly shape the performance and cost of an entire system. Eliyan's approach spans several layers of that problem. NuLink IP https://eliyan.com/products/?ref=runtimewire covers die-to-die and chip-to-chip connections, while NuGear chiplets target memory and I/O links. Eliyan says the technology can operate on standard organic packaging as well as advanced packaging, reducing reliance in some designs on silicon interposers and bridges. Those packaging claims are central to Farjadrad's pitch because many high-bandwidth chiplet architectures rely on costly silicon interposers or bridges. Eliyan is arguing that customers can preserve high-bandwidth connections while gaining greater flexibility over how the system is assembled. Eliyan's performance and power comparisons remain reported by Eliyan rather than independent benchmarks. Eliyan frames NuLink-XD around the same constraint: moving data between compute resources without blowing up power budgets. In the NuLink-XD announcement https://eliyan.com/press-release/eliyan-introduces-nulink-xd/?ref=runtimewire , Eliyan says NuLink-XD can consume up to 40% less power, depending on channel reach and configuration. Eliyan has not attached customer names, production volumes or revenue figures to the launch. Capital for commercialization Eliyan has announced multiple financings since 2022. It raised a $40 million Series A in November 2022 https://eliyan.com/press-release/eliyan-closes-40m-series-a-funding-round-and-unveils-industrys-highest-performance-chiplet-interconnect-technologies/?ref=runtimewire led by Tracker Capital, with Celesta Capital, Intel Capital and Micron Ventures participating. A $60 million Series B followed in March 2024 https://eliyan.com/press-release/eliyan-closes-60-million-series-b-funding-round/?ref=runtimewire , co-led by Samsung Catalyst Fund and Tiger Global Management. Intel Capital, SK hynix, Cleveland Avenue and Mesh Ventures also participated. Eliyan then announced an investment from VentureTech Alliance in August 2024. On January 28, 2026, Eliyan disclosed $50 million in strategic investments https://eliyan.com/press-release/eliyan-secures-50-million-in-strategic-investments/?ref=runtimewire from AMD, Arm, Coherent and Meta, alongside Samsung Catalyst Fund and Intel Capital. Eliyan said the proceeds would accelerate manufacturing and qualification of next-generation interconnect IP and chiplet products, expand industry partnerships and support deployment across AI infrastructure, high-performance computing and edge applications. The January investor group reveals how Eliyan is positioning itself. It has backing from processor designers, an instruction-set architecture provider, an optical-components supplier, a hyperscale infrastructure buyer and large semiconductor investors. Each sits somewhere along the chain Eliyan wants to connect. Eliyan did not publish a valuation in its financing announcement. Forge lists the January Series C financing tranches https://forgeglobal.com/eliyan stock/?ref=runtimewire at a $961.81 million post-money valuation. Farjadrad's second semiconductor scaling act Eliyan was co-founded with Patrick Soheili and Syrus Ziai. Soheili previously held business development, marketing and operations roles at eSilicon, Altera and AMD. Ziai held engineering leadership positions at Nuvia, Qualcomm and PsiQuantum. Eliyan's current leadership page https://eliyan.com/team/?ref=runtimewire lists Farjadrad as CEO, Soheili as chief strategy and business officer and Ziai as chief operating officer. The founders have built Eliyan around a shift from monolithic processors toward systems assembled from multiple specialized dies. Arm says https://www.arm.com/markets/chiplets?ref=runtimewire chiplets let designers combine components made with different process nodes, providing greater design flexibility. Every split also creates another connection that must carry data without wasting power or adding unacceptable latency. Investors have already assigned multibillion-dollar outcomes to adjacent approaches. Optical interconnect developer Ayar Labs raised $500 million in a round backed by Nvidia and AMD https://www.datacenterdynamics.com/en/news/optical-interconnect-startup-ayar-labs-closes-500m-funding-round-backed-by-nvidia-and-amd/?ref=runtimewire . Marvell agreed to acquire optical-connectivity developer Celestial AI for $3.25 billion upfront https://investor.marvell.com/news-events/press-releases/detail/1000/marvell-to-acquire-celestial-ai-accelerating-scale-up-connectivity-for-next-generation-data-centers?ref=runtimewire , with additional earnouts tied to milestones. Eliyan occupies a related but wider electrical-interconnect position, spanning links within packages and connections to memory, networking silicon and optical modules. Eliyan says the $50 million financing will accelerate manufacturing and qualification of its next-generation interconnect IP and chiplet products. The commercial value will depend on power budgets, packaging economics, production schedules and adoption by system designers. The harder milestone will come when Eliyan's links appear in disclosed production systems. Farjadrad has spent his career turning connectivity designs into standards and commercial silicon. Eliyan is his attempt to repeat that pattern as AI systems run into the physical limits of moving data.