{"slug": "d-matrix-targets-nvidia-mgx-rack-integration-for-raptor-xpu-by-q4-2027", "title": "D-Matrix targets Nvidia MGX rack integration for Raptor XPU by Q4 2027", "summary": "AI inference chip startup d-Matrix plans to integrate its Raptor XPU into Nvidia's MGX rack architecture by Q4 2027, with a first Raptor tape-out expected before the end of 2026. D-Matrix says Raptor, which debuted at Hot Chips 2026 in August, combines a TSMC 4nm logic die with 3D-stacked DRAM to deliver over 100 TB/s of memory bandwidth and 32 GB of capacity per card, claiming roughly 4.7 times higher throughput per card than HBM-based alternatives for generative inference. The Santa Clara company has raised between $450 million and $500 million total, including a $275 million Series C that valued it at about $2 billion, and the Raptor integration involves connectivity chipmaker Astera Labs.", "body_md": "Photo: Matheus Bertelli / Pexels\n\n# D-Matrix targets Nvidia MGX rack integration for Raptor XPU by Q4 2027\n\nThe AI inference startup plans to slot its custom accelerators into Nvidia's rack infrastructure, promising a nearly 5x throughput advantage over conventional HBM designs\n\nAI inference chip startup d-Matrix wants its upcoming Raptor XPU to live inside [Nvidia](https://cryptobriefing.com/markets/nvidia/)’s MGX rack architecture by the end of 2027, and the company has a fairly concrete roadmap to get there. The Santa Clara-based firm expects its first Raptor tape-out to land before the close of 2026, with full rack-scale deployment targeting Q4 2027.\n\nD-Matrix is integrating Raptor with Nvidia’s NVLink Fusion interconnect, which means up to 144 Raptor XPUs could operate inside a single NVLink fabric by the time 2027 wraps up.\n\n## What Raptor is actually built to do\n\nRaptor debuted publicly at Hot Chips 2026 in August, and the technical specs are worth paying attention to. The platform combines a TSMC 4nm logic die with 3D-stacked DRAM, targeting over 100 TB/s of memory bandwidth with 32 GB of capacity per card.\n\nD-Matrix claims Raptor delivers approximately 4.7 times higher throughput per card compared to HBM-based alternatives for generative inference tasks.\n\n## The Corsair foundation and the funding behind it\n\nRaptor is d-Matrix’s next act, but the company is not a pre-revenue concept. Its current platform, Corsair, is already in production and uses digital in-memory compute built on SRAM.\n\nThe company has raised between $450 million and $500 million in total funding, including a $275 million Series C round that valued the company at roughly $2 billion. Partners in the broader ecosystem include Alchip and Andes, and the Raptor integration specifically involves Astera Labs, a connectivity chipmaker that sits inside Nvidia’s technology ecosystem.\n\n**Disclosure:** This article was edited by Editorial Team. For more information on how we create and review content, see our\n\n[Editorial Policy](https://cryptobriefing.com/editorial-policy/).", "url": "https://wpnews.pro/news/d-matrix-targets-nvidia-mgx-rack-integration-for-raptor-xpu-by-q4-2027", "canonical_source": "https://cryptobriefing.com/d-matrix-raptor-xpu-nvidia-mgx-rack-2027/", "published_at": "2026-09-10 13:27:57+00:00", "updated_at": "2026-09-10 13:38:52.517934+00:00", "lang": "en", "topics": ["ai-chips", "ai-infrastructure", "ai-startups", "ai-products"], "entities": ["d-Matrix", "Nvidia", "Raptor XPU", "Nvidia MGX", "NVLink Fusion", "TSMC", "Corsair", "Astera Labs"], "alternates": {"html": "https://wpnews.pro/news/d-matrix-targets-nvidia-mgx-rack-integration-for-raptor-xpu-by-q4-2027", "markdown": "https://wpnews.pro/news/d-matrix-targets-nvidia-mgx-rack-integration-for-raptor-xpu-by-q4-2027.md", "text": "https://wpnews.pro/news/d-matrix-targets-nvidia-mgx-rack-integration-for-raptor-xpu-by-q4-2027.txt", "jsonld": "https://wpnews.pro/news/d-matrix-targets-nvidia-mgx-rack-integration-for-raptor-xpu-by-q4-2027.jsonld"}}