CUDA 13.5 Takes Vera Rubin to General Availability and Retires TCC Mode on Rubin GPUs

NVIDIA shipped CUDA 13.5, the toolkit release that moves Vera Rubin GPU support from early developer access to general availability for enterprise production, according to NVIDIA's developer blog. The release retires Tesla Compute Cluster (TCC) driver mode on Rubin and later GPUs, leaving WDDM or Microsoft's MCDM, and adds a third-generation Multi-Process Service (MPS v3) with weighted timeslicing, SM load balancing between partitions, and cgroup v2 namespace routing. NVIDIA also quotes up to 1.5x faster FP64 SYR2K, HER2K, SYRKX and HERKX routines in cuBLAS on B200, a 1.65x to 2.27x faster ALG3 CSR SpMM path in cuSPARSE, a 2.79x geometric-mean speedup in sparse triangular solve analysis, and 10% to 600% nvJPEG hybrid decode gains.

NVIDIA’s CUDA 13.5 moves Vera Rubin from early developer access to general availability, rebuilds GPU sharing with a third-generation MPS, and quietly retires the TCC driver mode for Rubin and every GPU after it. NVIDIA has shipped CUDA 13.5, and the headline item is simple: this is the toolkit release that declares Vera Rubin ready for production. In its developer blog announcement https://developer.nvidia.com/blog/nvidia-cuda-13-5-brings-nvidia-vera-rubin-ga-support/ , the company says Rubin support “moves from early developer access to general availability GA , ready for enterprise production.” For anyone who has been holding Rubin hardware in evaluation, CUDA 13.5 is the sign-off they were waiting for. A point release that blesses a new architecture would normally be the whole story. This one carries a lot more, and one change in particular matters to Windows shops. TCC is out on Rubin Buried in the platform notes is a one-line farewell: “Tesla Compute Cluster TCC is not supported on Rubin and later GPUs.” TCC has been the standard Windows driver mode for headless compute cards for years, because it sidesteps the display-oriented WDDM stack and its overheads. On Rubin, the choice narrows to WDDM or MCDM, Microsoft’s compute-focused driver model. Anyone whose deployment scripts flip cards into TCC with nvidia-smi will need to rework them before the new hardware goes in. On the Windows side there is good news as well: Windows on Arm support, generally available since CUDA 13.4, now extends to DGX Station for Windows. MPS v3 and smarter GPU sharing The Multi-Process Service, which lets several processes share one GPU, gets its third major revision. MPS v3 adds weighted timeslicing, so an administrator can hand some servers a bigger share of GPU time than others, plus load balancing between SM partitions: an idle partition can lend its streaming multiprocessors, and a busy one can borrow them. It can also route clients into namespaces through cgroup v2, each namespace with its own SM partition assignment. That is exactly the plumbing container-heavy clusters have been asking for. A polling-based memory accounting fallback covers setups where the default method does not work. Green contexts get finer control too. Partitions built around a locality domain can now pull in supplemental SMs, and the SM split API gains a discovery mode that reports how many SMs each partition would receive. Tile kernels go multi-GPU CUDA Tile, NVIDIA’s higher-level tile-based programming model, can now talk across GPUs. Tile kernels get unicast pointers over NVLink, and on NVSwitch systems with NVLink SHARP they can use multicast pointers and multimem operations for in-fabric reductions and stores. A public preview of Tile-SIMT interop lets Tile code call into NVSHMEM, CCCL, Warp and MathDx library functions. Calling your own device functions is still on the to-do list. The library numbers The math libraries pick up the usual round of speedups. NVIDIA quotes up to 1.5x faster FP64 SYR2K, HER2K, SYRKX and HERKX routines in cuBLAS on B200, and new NVFP4 and MXFP8 heuristics on Vera Rubin that should make per-shape autotuning unnecessary. cuSPARSE’s ALG3 CSR SpMM path is quoted at 1.65x to 2.27x faster, the sparse triangular solve analysis phase at 2.79x on geometric mean, and nvJPEG’s hybrid GPU decode gains anywhere from 10% to 600%, depending on the workload. Rounding things out are cuda.core 1.2, CCCL 3.5 with deterministic scans and a batched top-K primitive, Nsight Compute 2026.4, and a public preview of the Nsight Perf SDK for AI. What it means For GeForce owners, CUDA 13.5 changes very little day to day. Its weight sits in the data center, where Vera Rubin is NVIDIA’s next major platform, and a GA toolkit is what turns that hardware from an engineering exercise into something IT departments will approve for production. NVIDIA’s blog post does not list a minimum driver version or a full compute-capability matrix, so check the official release notes before upgrading production machines. The TCC change is the one to plan for now.