# CPO Is Shipping, but Foundries Are Taking Four Different Routes > Source: > Published: 2026-08-05 08:23:09.626964+00:00 # CPO Is Shipping, but Foundries Are Taking Four Different Routes - Broadcom says its Tomahawk 5-Bailly became the first volume-production CPO solution, while Nvidia says its 200Gb/s-SerDes Spectrum-X Ethernet Photonics switches entered production in 2026. [[1]](https://nvidianews.nvidia.com/news/vera-rubin-full-production-agentic-ai-factory)[[2]](https://investors.broadcom.com/news-releases/news-release-details/broadcom-announces-third-generation-co-packaged-optics-cpo) - Broadcom’s shipping Tomahawk 6-Davisson switch explicitly uses optical engines based on TSMC’s COUPE technology, providing the clearest disclosed customer validation among the four foundry roadmaps. [[3]](https://investors.broadcom.com/news-releases/news-release-details/broadcom-announces-tomahawkr-6-davisson-industrys-first-1024) - Intel remains focused on a compute-oriented optical I/O chiplet, Samsung is targeting turnkey CPO services in 2029, and GlobalFoundries is offering an OCI-compatible merchant platform. [[6]](https://newsroom.intel.com/artificial-intelligence/intel-unveils-first-integrated-optical-io-chiplet)[[9]](https://www.thelec.net/news/articleView.html?idxno=6189)[[10]](https://gf.com/news-and-events/news/globalfoundries-accelerates-adoption-of-co-packaged-optics-for-advanced-ai-data-centers-with-scale-optical-module-solution/) - Thermal drift, fiber attachment, repair procedures, interoperability and combined optical-electrical testing remain obstacles to broader deployment. [[12]](https://blogs.sw.siemens.com/semiconductor-packaging/2026/02/05/five-key-trends-of-co-packaged-optics-cpo-in-2026/)[[13]](https://semiengineering.com/co-packaged-optics-testing-faces-steep-data-center-ramp/) Co-packaged optics has moved beyond laboratory demonstrations, although the scale of deployment varies. Broadcom said in May 2025 that its 100Gb/s-per-lane Tomahawk 5-Bailly chipset had become the first volume-production CPO solution. Nvidia said on May 31, 2026, that its Spectrum-X Ethernet Photonics switches, built with 200Gb/s SerDes, were in production, naming CoreWeave, Lambda and Oracle Cloud Infrastructure as early ecosystem partners and adopters.[[1]](https://nvidianews.nvidia.com/news/vera-rubin-full-production-agentic-ai-factory)[[2]](https://investors.broadcom.com/news-releases/news-release-details/broadcom-announces-third-generation-co-packaged-optics-cpo) The foundries supplying photonic processes and advanced packaging are not following one blueprint. TSMC is extending its CoWoS and SoIC packaging ecosystem into optics. Intel has demonstrated an integrated optical compute interconnect chiplet. Samsung Foundry is moving from a 300-millimeter silicon-photonics platform toward optical engines and turnkey CPO. GlobalFoundries is positioning its SCALE platform as a customizable merchant option. Those differences matter because CPO is not simply a faster transceiver. Moving the optical conversion engine from a switch’s front panel to the package changes how the system is designed, cooled, tested, assembled and repaired. ## Why electrical links are becoming the constraint AI accelerators exchange model parameters and intermediate results across scale-up fabrics inside computing domains and scale-out networks connecting racks. As electrical signaling rates rise, insertion loss, reflections and crosstalk make long package and circuit-board traces harder to drive. Equalization and retiming can restore signal integrity, but they consume additional power and create heat. CPO shortens the electrical portion of the link by placing a photonic integrated circuit, or PIC, beside the switch or compute die. The data is converted into light near its source and then carried over fiber. Intel’s 2024 prototype illustrates the potential: the company demonstrated 4 Tb/s of bidirectional traffic over as much as 100 meters while claiming energy consumption of 5 picojoules per bit, compared with about 15 pJ/bit for the pluggable modules used as its benchmark.[[6]](https://newsroom.intel.com/artificial-intelligence/intel-unveils-first-integrated-optical-io-chiplet) Copper remains attractive for short, inexpensive links, and improving SerDes technology continues to extend its useful life. CPO becomes compelling where bandwidth density and electrical reach make the power and cooling costs of conventional links unacceptable. ## TSMC: photonics as an extension of advanced packaging TSMC’s Compact Universal Photonic Engine, or COUPE, uses SoIC-X bonding to stack an electrical die on a photonic die, reducing the distance and impedance between the two components. TSMC introduced that architecture in 2024 and said in April 2026 that its first true CPO configuration, COUPE on substrate, would begin production during 2026.[[4]](https://pr.tsmc.com/english/news/3302)[[5]](https://pr.tsmc.com/english/news/3136) TSMC claims the packaged implementation provides twice the power efficiency and 90% lower latency than a comparable pluggable implementation on a circuit board. The company has also disclosed a 200Gb/s micro-ring modulator. Those figures are TSMC comparisons rather than independently reproduced benchmarks.[[4]](https://pr.tsmc.com/english/news/3302) Broadcom provides the clearest evidence that COUPE has reached a named commercial platform. Its 102.4-Tb/s Tomahawk 6-Davisson CPO switch, announced as shipping in October 2025, integrates TSMC COUPE-based optical engines using substrate-level multichip packaging. That arrangement ties TSMC’s photonics roadmap directly to a switch vendor already selling CPO systems.[[3]](https://investors.broadcom.com/news-releases/news-release-details/broadcom-announces-tomahawkr-6-davisson-industrys-first-1024) ## Intel, Samsung and GlobalFoundries are targeting different customers Intel’s Optical Compute Interconnect is a compact optical I/O subsystem rather than a complete switch platform. Its demonstrated chiplet combines a silicon PIC, electrical interface circuitry, on-chip lasers and optical amplifiers. The prototype used 64 channels running at 32Gb/s in each direction, with eight wavelength-division-multiplexed channels on each fiber pair, and connected to an Intel CPU through PCIe 5.0.[[6]](https://newsroom.intel.com/artificial-intelligence/intel-unveils-first-integrated-optical-io-chiplet) Intel says the chiplet can also be co-packaged with GPUs, infrastructure processors and other systems-on-chip, and that 200Gb/s-per-lane PICs for 800Gb/s and 1.6-Tb/s applications are under development. In the public materials reviewed for this article, Intel did not identify a production OCI customer or commercial launch date. That leaves its roadmap technically differentiated but less commercially defined than Broadcom’s TSMC-based deployment.[[6]](https://newsroom.intel.com/artificial-intelligence/intel-unveils-first-integrated-optical-io-chiplet) Samsung Foundry is building a staged manufacturing stack. Its official material shows an architectural progression from side-by-side electrical and photonic dies in pluggable modules, to vertically stacked optical engines, then optical engines beside switch ASICs and eventually beside XPUs, GPUs and HBM on an interposer. Samsung also presented its 300-mm silicon-photonics foundry platform at OFC 2026.[[7]](https://semiconductor.samsung.com/foundry/application-specific-service/hpc-ai/)[[8]](https://opg.optica.org/abstract.cfm?uri=OFC-2026-Tu2D.3) Reporting from The Elec on Samsung’s OFC disclosure places thermo-compression-bonded optical engines in 2027, hybrid copper bonding in 2028 and turnkey CPO services in 2029. Samsung’s public website does not attach those dates to its packaging diagram, so the timeline should be treated as a reported roadmap rather than a production commitment. The company has not publicly named a customer for its turnkey CPO service.[[7]](https://semiconductor.samsung.com/foundry/application-specific-service/hpc-ai/)[[9]](https://www.thelec.net/news/articleView.html?idxno=6189) GlobalFoundries’ SCALE platform is aimed at customers that want merchant silicon photonics without tying the optical engine to a specific leading-edge logic process. GF says SCALE supports coarse and dense wavelength-division multiplexing, including demonstrated eight- and 16-wavelength bidirectional links, plus qualified 50Gb/s and 100Gb/s micro-ring modulators.[[10]](https://gf.com/news-and-events/news/globalfoundries-accelerates-adoption-of-co-packaged-optics-for-advanced-ai-data-centers-with-scale-optical-module-solution/) Through-silicon vias and copper pitches ranging from 110 micrometers to below 45 micrometers allow the optical platform to be assembled with externally sourced electrical dies using 2.5D or 3D packaging. GF also designed SCALE to support the Optical Compute Interconnect Multi-Source Agreement, which is developing open scale-up links across pluggable, on-board and co-packaged formats.[[10]](https://gf.com/news-and-events/news/globalfoundries-accelerates-adoption-of-co-packaged-optics-for-advanced-ai-data-centers-with-scale-optical-module-solution/)[[11]](https://www.broadcom.com/company/news/product-releases/optical-scale-up-consortium-established-to-create-an-open-specification-for-ai-infrastructure) ## Packaging and operations will decide the winners The hardest remaining problems sit between technical disciplines. Photonic devices, particularly micro-ring resonators, are sensitive to temperature, while neighboring switch and accelerator dies create large and rapidly changing thermal loads. Designers must control wavelength drift, optical loss and laser efficiency while cooling the logic.[[12]](https://blogs.sw.siemens.com/semiconductor-packaging/2026/02/05/five-key-trends-of-co-packaged-optics-cpo-in-2026/) Testing is another bottleneck. CPO packages require optical and electrical measurements at wafer, package and system levels, while connector types, engine counts and packaging layouts vary between designs. Ira Leventhal of Advantest America told Semiconductor Engineering that nobody has “all the answers yet” for package testing as the industry attempts to move from engineering builds to annual volumes in the millions.[[13]](https://semiengineering.com/co-packaged-optics-testing-faces-steep-data-center-ramp/) Serviceability changes as well. A failed front-panel transceiver can be replaced without removing the switch. A failure inside a co-packaged assembly can affect a more expensive component unless the design uses detachable fiber connectors, external laser sources, redundant lanes and known-good-die screening. Broadcom, TSMC and GlobalFoundries have all emphasized packaging or connector strategies intended to reduce that risk, but no single service model has become universal.[[3]](https://investors.broadcom.com/news-releases/news-release-details/broadcom-announces-tomahawkr-6-davisson-industrys-first-1024)[[4]](https://pr.tsmc.com/english/news/3302)[[10]](https://gf.com/news-and-events/news/globalfoundries-accelerates-adoption-of-co-packaged-optics-for-advanced-ai-data-centers-with-scale-optical-module-solution/) Dell’Oro analyst Sameh Boujelbene has described the interconnect fabric as “a major bottleneck” and said technology and supply-chain gaps have hindered widespread CPO adoption. The four foundry roadmaps show substantial progress, but their maturity cannot be judged by optical bandwidth alone. Customers also need acceptable yields, predictable thermals, interoperable components and repair procedures that work inside an operating data center.[[14]](https://lightmatter.co/press-release/lightmatter-announces-reference-architecture-initiative-with-industry-leaders-in-the-open-compute-project-for-co-packaged-optics/) ## Companies mentioned ## Further sources [[1] Nvidia, “NVIDIA Vera Rubin Ramps Into Full Production to Power Agentic AI Facto… ↗](https://nvidianews.nvidia.com/news/vera-rubin-full-production-agentic-ai-factory) [[2] Broadcom, “Broadcom Announces Third-Generation Co-Packaged Optics Technology wi… ↗](https://investors.broadcom.com/news-releases/news-release-details/broadcom-announces-third-generation-co-packaged-optics-cpo) [[3] Broadcom, “Broadcom Announces Tomahawk 6-Davisson, the Industry’s First 102.4-T… ↗](https://investors.broadcom.com/news-releases/news-release-details/broadcom-announces-tomahawkr-6-davisson-industrys-first-1024) [[4] TSMC, “TSMC Debuts A13 Technology at 2026 North America Technology Symposium,” … ↗](https://pr.tsmc.com/english/news/3302) [[5] TSMC, “TSMC Celebrates 30th North America Technology Symposium with Innovations… ↗](https://pr.tsmc.com/english/news/3136) [[6] Intel, “Intel Demonstrates First Fully Integrated Optical I/O Chiplet,” June 26… ↗](https://newsroom.intel.com/artificial-intelligence/intel-unveils-first-integrated-optical-io-chiplet)+8 more The stories that matter, in one email. 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