BTQ validates compute-in-memory accelerator for quantum-proof cryptography

BTQ Technologies and Taiwan's Industrial Technology Research Institute (ITRI) completed the first validation milestone for BTQ's Quantum Compute-in-Memory (QCIM) architecture in a TSMC 28-nanometer design environment, confirming its feasibility and functional correctness for post-quantum cryptography (PQC). The architecture executed cryptographic operations for three NIST post-quantum standards (FIPS 203, 204, 205) and is designed to reduce data movement and power consumption in edge and IoT devices. BTQ expects to ship test chips to customers by year-end.

BTQ Technologies and Taiwan’s Industrial Technology Research Institute ITRI completed the first validation milestone for a hardware architecture designed to accelerate post-quantum cryptography PQC . The organizations validated BTQ’s Quantum Compute-in-Memory QCIM architecture in a Taiwan Semiconductor Manufacturing Co. TSMC 28-nanometer design environment, confirming the design's feasibility and functional correctness before fabrication as a test chip. QCIM executed cryptographic operations associated with three post-quantum Federal Information Processing Standards FIPS published by the National Institute of Standards and Technology NIST . These comprise FIPS 203 for the module lattice-based key-establishment mechanism ML-KEM , FIPS 204 for the ML-digital signature algorithm DSA , and FIPS 205 for the stateless hash-based SLH DSA signature algorithm. The architecture operated across multiple algorithms and testing conditions, according to BTQ. The company also claimed performance advantages but did not disclose figures or comparative benchmarks. QCIM is a soft-IP accelerator block designed to perform classical and PQC operations within the memory subsystem. Soft IP can be incorporated into different semiconductor designs rather than being tied to a single finished chip. Performing computations closer to memory is intended to reduce the movement of data between memory and the processor, potentially lowering latency and power consumption. These constraints can be particularly important when implementing more computationally demanding PQC algorithms in edge and IoT devices with limited processing and energy resources. Support for multiple algorithms also enables cryptographic agility, allowing devices to accommodate different cryptographic standards and potentially adapt as security requirements evolve. Organizations are expected to operate classical and PQC in parallel during the transition to PQC. BTQ is targeting military, industrial, automotive, IoT, physical AI, edge, and connected infrastructure applications where cryptographic protection must be balanced against power and performance constraints. The work forms part of a broader QCIM chip roadmap led by BTQ and South Korean quantum-safe semiconductor security company ICTK. BTQ provides the cryptographic architecture; ICTK contributes secure semiconductor and physical "unclonable" function technology; and ITRI handles semiconductor design, integration, and validation. “As post-quantum security moves from standardization toward implementation, organizations will require hardware that can deliver stronger cryptographic protection without creating unacceptable performance, power, or deployment constraints,” BTQ CEO Olivier Roussy Newton explained. The program will now move into module-level integration, verification, and validation to assess how the QCIM core can be incorporated into wider system architectures. BTQ expects to ship test chips to selected customers and strategic partners by year-end for performance and functional evaluation.