Model Explorer goes beyond high-level model graphs. See how Arm plugs in custom compiler IRs, verifies NPU delegation side-by-side, and maps cycle-level profiling traces directly onto your execution graph.
Machine learning models run locally on a wide range of hardware, from low-power edge devices to gaming graphics and physical AI systems. Running models efficiently on these targets requires compilation steps such as quantization, graph lowering, operator fusion, and hardware delegation.
Arm used Google AI Edge Model Explorer to give developers visibility into these pipelines. With Model Explorer's hierarchical graph visualization and plugin architecture, Arm built several open-source adapters that make edge model transformations easier to inspect.
When deploying a model to edge hardware, a framework change or operator constraint can alter the exported execution graph. Engineers often need to answer three questions:
Answering these questions by reading raw flatbuffers or text logs takes time, especially for large language models (LLMs) and neural networks. Arm needed a visual tool to inspect Arm-specific intermediate representations and hardware profiling traces.
To address these deployment challenges, Arm developed custom adapters for Google AI Edge Model Explorer to support several model formats (i.e., TOSA, ** VGF**, and ** PTE**), establishing a comprehensive visual workflow for on-device optimization. Using these extensions, engineering teams can validate exported pipelines, verify accelerator delegation, and pinpoint cycle-level performance bottlenecks directly on the model graph:
Arm engineers used Model Explorer to validate a PyTorch-trained Neural Super Sampling (NSS) model exported through the ExecuTorch Arm backend as a VGF file for Vulkan ML Extensions. While inspecting the VGF graph, the team found unintended TRANSPOSE operators introduced by a change in the ExecuTorch Arm backend.
Model Explorer enables users to inspect individual nodes of the model graph, such as the rescale operator depicted below, which displays the operator's attributes and SPIR-V tensor connections. This functionality assisted the Arm team in identifying and resolving the regression without requiring manual analysis of raw log files.
To optimize vision models for accelerators like the Arm Ethos-U85 NPU, Arm engineers used Model Explorer's split-pane view to compare CPU and NPU-delegated graphs side-by-side for a Ultralytics YOLO model.
The split-pane view showed the structural difference: the CPU graph displays each individual layer, while the NPU graph groups the network into a single EthosUBackend block between quantize and dequantize nodes. For partially supported models in LiteRT or ExecuTorch, this view helps identify un-delegated operators and split subgraphs.
To find latency bottlenecks on the Ethos-U NPU, Arm ran their model on their Fixed Virtual Platform (FVP) simulator and used Model Explorer's node data plugin to overlay cycle-accurate execution traces onto the graph. Color-coded heatmaps showed that a single TRANSPOSE node was the main latency bottleneck.
You can use Google AI Edge Model Explorer along with Arm's open-source adapters today to inspect and optimize your own on-device models locally via PyPI or GitHub.
Special thanks to the contributors across the Arm and Google AI Edge teams for their work on these adapters and integrations:
Engineers:
Product manager: Charlie Stokes (ARM), Derek Bekebrede
Designers: Ami Kubota, Ioannis Politis (ARM), Kathleen Low, Philip Watson (ARM)
Senior Sponsors: Bala Gattu (ARM), Cormac Brick, Joe Alderson (ARM), Matthias Grundmann, Sharbani Roy (ARM)