{"slug": "arms-neoverse-css-n4-scales-to-128-cores-with-lpddr6-and-pcie-gen-7", "title": "Arm’s Neoverse CSS N4 scales to 128 cores with LPDDR6 and PCIe Gen 7", "summary": "Arm introduced Neoverse CSS N4 on September 8, 2026, a pre-integrated server CPU platform scaling from 8 to 128 Neoverse N4 cores per die at up to 3.8 GHz, and the first Neoverse CSS design to support LPDDR6 memory and PCIe Gen 7. Arm claims the platform delivers up to twice the socket performance, 1.25 times the performance per watt and 1.75 times the memory bandwidth of CSS N3, though those are Arm's own estimates. Arm has not identified a production customer or shipping date for a CSS N4-based processor.", "body_md": "# Arm’s Neoverse CSS N4 scales to 128 cores with LPDDR6 and PCIe Gen 7\n\n- CSS N4 supports 8 to 128 cores per die, frequencies up to 3.8 GHz and up to 256 MB of shared system-level cache. <sup>[\\[1\\]](https://www.arm.com/products/cloud-datacenter/neoverse-compute-subsystems/css-n4)</sup>\n- The platform adds LPDDR6, PCIe Gen 7, PCIe Gen 6, CXL 4.0 and chiplet-scaling options, although some of those details come from technical coverage rather than Arm’s main announcement. <sup>[\\[2\\]](https://www.computerbase.de/news/prozessoren/arm-neoverse-css-n4-baukasten-fuer-server-cpus-mit-128-kernen-und-pcie-7-0.99284/)</sup>\n- Arm claims up to twice the socket performance, 1.25 times the performance per watt and 1.75 times the memory bandwidth of CSS N3. Those are Arm’s own estimates. <sup>[\\[3\\]](https://newsroom.arm.com/news/arm-agi-cpu-neoverse-css-n4-agentic-ai)</sup>\n- Arm has announced broader Arm-based customer activity but has not identified a production customer or shipping date for a CSS N4-based processor. <sup>[\\[4\\]](https://newsroom.arm.com/news/arm-agi-cpu-neoverse-css-n4-agentic-ai)</sup>\n\nArm introduced Neoverse CSS N4 on September 8, 2026, giving chip designers a pre-integrated platform for custom server CPUs, data-processing units and AI infrastructure chips with as many as 128 cores on a single die. The platform is the first Neoverse CSS design to support LPDDR6 memory and PCIe Gen 7 connectivity. [\\[1\\]](https://www.arm.com/products/cloud-datacenter/neoverse-compute-subsystems/css-n4)\n\nThe release expands Arm’s semi-custom offering rather than introducing a finished processor. Customers can configure core count, cache, memory, I/O, accelerator connections and chiplet interfaces, then integrate the subsystem into their own SoC. Arm is targeting cloud, networking and AI infrastructure, including the CPU-side work involved in coordinating accelerators and moving data through agentic-AI systems. [\\[2\\]](https://www.computerbase.de/news/prozessoren/arm-neoverse-css-n4-baukasten-fuer-server-cpus-mit-128-kernen-und-pcie-7-0.99284/)\n\n## A configurable starting point for custom silicon\n\nNeoverse CSS sits between licensing individual Arm cores and buying a production-ready processor. The package combines Neoverse CPU cores, Arm’s coherent mesh interconnect, system and power-management IP, software and reference designs. Arm says the pre-integrated approach reduces design risk and can accelerate CPU time to market by up to one year; that remains a company claim rather than an independently audited schedule. [\\[5\\]](https://www.arm.com/products/cloud-datacenter/neoverse-compute-subsystems)\n\nCSS N4 can be configured with 8 to 128 Neoverse N4 cores per die and frequencies of up to 3.8 GHz. The platform supports up to 2 MB of private L2 cache per core and 256 MB of shared system-level cache per die, according to technical coverage of the launch. Arm’s product page confirms the core-count and frequency ranges but does not label the 256 MB figure as L3 cache. [\\[1\\]](https://www.arm.com/products/cloud-datacenter/neoverse-compute-subsystems/css-n4)[\\[2\\]](https://www.computerbase.de/news/prozessoren/arm-neoverse-css-n4-baukasten-fuer-server-cpus-mit-128-kernen-und-pcie-7-0.99284/)\n\nThe platform was previously identified on Arm’s roadmap as CSS Ranger. That codename is distinct from “Falcon,” which appeared in the supplied discovery headline; Arm’s current product and announcement pages identify the product as Neoverse CSS N4. [\\[2\\]](https://www.computerbase.de/news/prozessoren/arm-neoverse-css-n4-baukasten-fuer-server-cpus-mit-128-kernen-und-pcie-7-0.99284/)\n\n## Memory and I/O are the main platform changes\n\nN4 supports DDR5 and LPDDR6 memory, as well as PCIe 6.0 and PCIe 7.0. ComputerBase reports support for up to 128 PCIe lanes, CXL 4.0 and UCIe-based chiplet scaling. Those interfaces give designers more options for attaching accelerators, networking devices and expanded memory, but the final configuration will depend on each customer’s implementation. [\\[2\\]](https://www.computerbase.de/news/prozessoren/arm-neoverse-css-n4-baukasten-fuer-server-cpus-mit-128-kernen-und-pcie-7-0.99284/)\n\nLPDDR6 gives customers a lower-power memory option for designs that prioritize bandwidth per watt, while PCIe Gen 7 raises the available link bandwidth for attached devices. Those are platform capabilities, not guarantees of system-level performance: memory channels, package design, firmware and workload characteristics will determine the result.\n\nCompared with Arm’s published CSS N2 specifications, N4 doubles the maximum core count from 64 to 128 and raises the shared system-level cache ceiling from 64 MB to 256 MB. N2 supports up to 1 MB of private L2 cache per core, DDR5 or LPDDR5 and PCIe/CXL Gen 5. Arm’s public CSS overview does not provide a complete N4-to-N2 comparison for every memory and I/O option, so claims of a fourfold L3-cache increase should be treated as a terminology-dependent comparison rather than a direct Arm specification. [\\[5\\]](https://www.arm.com/products/cloud-datacenter/neoverse-compute-subsystems)\n\n## Performance claims await customer silicon\n\nFor a reference configuration with 128 cores at 3 GHz and 2 MB of L2 cache per core, Arm claims up to twice the socket performance, 1.25 times the performance per watt and 1.75 times the memory bandwidth of Neoverse CSS N3. Arm has not published independent benchmark results or a full methodology for those comparisons. [\\[3\\]](https://newsroom.arm.com/news/arm-agi-cpu-neoverse-css-n4-agentic-ai)\n\nComputerBase noted that the announced performance comparison does not establish how the tested N3 and N4 configurations differ. It also questioned how much of the performance-per-watt improvement could be attributed to the move to a newer manufacturing process rather than to the CPU and subsystem design itself. [\\[2\\]](https://www.computerbase.de/news/prozessoren/arm-neoverse-css-n4-baukasten-fuer-server-cpus-mit-128-kernen-und-pcie-7-0.99284/)\n\nThe N4 announcement is therefore stronger as a technical-platform disclosure than as evidence of competitive server performance. It does not establish how an N4-based processor will compare with AMD EPYC, Intel Xeon, AWS Graviton or Microsoft Cobalt on a specific workload. No production N4 server processor has been publicly benchmarked in the sources reviewed for this article. [\\[4\\]](https://newsroom.arm.com/news/arm-agi-cpu-neoverse-css-n4-agentic-ai)\n\n## Partners and availability remain open questions\n\nArm’s September 8 announcement named OpenAI, Meta, Cloudflare, Oracle, SAP, Lenovo, Supermicro and Verda as companies developing around the separate Arm AGI CPU. It also cited Google Cloud, Microsoft Azure and Nvidia in connection with Arm-based agentic-AI infrastructure. Those are ecosystem and customer references for Arm’s broader platform strategy, not announced CSS N4 design wins. [\\[4\\]](https://newsroom.arm.com/news/arm-agi-cpu-neoverse-css-n4-agentic-ai)\n\nArm’s CSS product page lists existing N-series deployments including Microsoft Cobalt 100, Google Axion, Alibaba Yitian and several DPU products based on earlier Neoverse generations. The page and launch announcement do not identify a production N4-based chip, sampling date or volume-production schedule. [\\[1\\]](https://www.arm.com/products/cloud-datacenter/neoverse-compute-subsystems/css-n4)[\\[4\\]](https://newsroom.arm.com/news/arm-agi-cpu-neoverse-css-n4-agentic-ai)\n\nComputerBase, which received launch information under an early-publication agreement, described N4 as an efficient middle position between Arm’s individual IP offerings and finished silicon such as the AGI CPU. Its assessment supports the commercial logic of the platform but does not provide independent performance data or confirm customer adoption. <sup>[\\[2\\]](https://www.computerbase.de/news/prozessoren/arm-neoverse-css-n4-baukasten-fuer-server-cpus-mit-128-kernen-und-pcie-7-0.99284/)</sup> For now, the next material checkpoints are named N4 design wins, customer silicon and benchmarks against competing server CPUs.\n\n## Companies mentioned\n\n## Further sources\n\nThe stories that matter, in one email. Free — unsubscribe anytime.", "url": "https://wpnews.pro/news/arms-neoverse-css-n4-scales-to-128-cores-with-lpddr6-and-pcie-gen-7", "canonical_source": "https://mlq.ai/news/arms-neoverse-css-n4-scales-to-128-cores-with-lpddr6-and-pcie-gen-7/", "published_at": "2026-09-10 18:24:18+00:00", "updated_at": "2026-09-12 13:39:31.284800+00:00", "lang": "en", "topics": ["ai-infrastructure", "ai-chips"], "entities": ["Arm", "Neoverse CSS N4", "Neoverse N4", "CSS N3", "LPDDR6", "PCIe Gen 7", "CXL 4.0", "ComputerBase"], "alternates": {"html": "https://wpnews.pro/news/arms-neoverse-css-n4-scales-to-128-cores-with-lpddr6-and-pcie-gen-7", "markdown": "https://wpnews.pro/news/arms-neoverse-css-n4-scales-to-128-cores-with-lpddr6-and-pcie-gen-7.md", "text": "https://wpnews.pro/news/arms-neoverse-css-n4-scales-to-128-cores-with-lpddr6-and-pcie-gen-7.txt", "jsonld": "https://wpnews.pro/news/arms-neoverse-css-n4-scales-to-128-cores-with-lpddr6-and-pcie-gen-7.jsonld"}}