# Arm Neoverse CSS N4 Ranger: 128 Cores, PCIe 7, and the AI Server Bottleneck Nobody’s Fixing > Source: > Published: 2026-09-08 21:11:15+00:00 Arm just doubled the core ceiling on its cloud server platform. The Neoverse CSS N4 — codenamed Ranger — lands at 128 cores per die on TSMC’s N3P process, with 256 MB of L3 cache, PCIe Gen 7 connectivity, CXL 4.0 support, and LPDDR6 memory for the first time in the N-series lineup. This is the template Amazon, Google, and Microsoft will use for their next generation of custom data center CPUs. The announcement is today; the silicon ships in 12 to 18 months. The developer implications run deeper than the spec sheet suggests. ## What Actually Changed From the N2 The prior-generation Neoverse CSS N2 topped out at 64 cores, 64 MB of L3 cache, and PCIe 5.0. Here is the full delta: | Feature | CSS N2 | CSS N4 | Change | |---|---|---|---| | Max cores per die | 64 | 128 | 2x | | Shared L3 cache | 64 MB | 256 MB | 4x | | L2 cache per core | 1 MB | 2 MB | 2x | | PCIe lanes | 64 × PCIe 5.0 | 128 × PCIe 6/7 | ~4x bandwidth | | CXL support | CXL 2.0 | CXL 4.0 | 4 generations | | Memory | DDR5 / LPDDR5 | DDR5 / LPDDR6 | LPDDR6 new | | Process node | TSMC N3 | TSMC N3P | Refined | Arm’s internal performance targets: 2x socket performance, 1.75x memory bandwidth, and 1.25x performance-per-watt versus the CSS N3. Those numbers are Arm’s own projections — no silicon has taped out yet and no independent benchmarks exist. The [Chips and Cheese technical review](https://chipsandcheese.com/p/arms-c2-ultra-g2-ultra-nx-and-css) noted the launch presentation was essentially a single slide of top-line specs. Take the figures as a design intent, not a delivered result. ## The Agentic AI Problem Nobody Talks About Everyone is adding GPU capacity. Almost nobody is fixing the CPU bottleneck. Agentic AI workloads look nothing like batch inference. A single orchestration layer managing dozens of concurrent agents runs constant tool calls, database lookups, retrieval operations, KV cache management, and security boundary enforcement between sandboxes — all on the CPU. The GPU fleet sits idle when the CPU can’t keep it fed. Arm is positioning the Neoverse CSS N4 directly at this chokepoint. The N4 addresses it with 1.75x more memory bandwidth than its predecessor and a target latency below 100 nanoseconds for memory access. CXL 4.0 support at 128 GT/s enables offloading KV caches to rack-scale pooled memory — [research puts that at a 3 to 6x throughput improvement for LLM inference](https://introl.com/blog/cxl-4-0-infrastructure-planning-guide-memory-pooling-2025) with an estimated 50 to 100 percent cost reduction. That is not a rounding error. CXL 4.0 products reach volume production in 2027, which is exactly when N4-based silicon is expected to arrive in the first cloud instances. ## Who Builds on CSS (and What Comes Next) The CSS semi-custom program is how hyperscalers get differentiated silicon without a chip team the size of Intel’s. [Amazon’s Graviton5 — 192 cores, Neoverse V3, generally available since June 2026](https://www.aboutamazon.com/news/aws/aws-graviton-5-cpu-amazon-ec2) — proved the model: 35 percent faster ML inference, 30 percent better database performance, at lower per-core cost than x86 alternatives. Google’s Axion (N2-based) is in general availability. Microsoft’s Azure Cobalt (also N2-based) is deployed at scale. N4 is the next design target. Graviton6, an Axion successor, and an Azure Cobalt refresh are the logical outputs. Arm also confirmed UCIe multi-chiplet support in N4, meaning partners can attach custom accelerator chiplets alongside the CPU die — a capability that gives AI chip startups a credible path to shipping competitive inference silicon without building a CPU from scratch. ## What Developers Should Do Before N4 Lands N4 cloud instances are 18 to 24 months out. Here is what to do now: - **Test on Graviton5 or Google Axion N4A today.** Both are in general availability. Performance gains on Arm are real and measurable. If your workload runs faster on Arm now, it will run faster on N4 later. - **Audit your container images for ARM64.** Multi-arch Docker builds are straightforward, but catching gaps early avoids a scramble at migration time. - **Benchmark your memory-bound workloads separately.** N4’s headline story is memory bandwidth. If your inference pipeline is constrained by data movement rather than compute, ARM64 migration will show the biggest gains. - **Watch for named N4 partner announcements.** Arm did not name a single customer building on N4 at launch. When Amazon or Google names N4 as the foundation for a next-generation instance type, that is the real signal to act. ## The Bottom Line The Arm Neoverse CSS N4 is a genuinely strong step forward — 128 cores, 4x the L3 cache, the first N-series platform with PCIe 7 and CXL 4.0, and LPDDR6 to serve the bandwidth-hungry inference workloads that define 2026 data centers. [Arm is extending a lead in the cloud CPU market](https://www.tomshardware.com/pc-components/cpus/arm-debuts-next-gen-semi-custom-neoverse-css-n4-ranger-platform-compute-subsystem-packs-up-to-128-cores-per-die-on-tsmc-n3p) it has been building since Graviton2, and N4 is the next move on that board. But “blueprint” and “shipping silicon” are two different things. Until a hyperscaler announces customer tape-outs and [independent benchmarks appear like those that validated Graviton5](https://newsroom.arm.com/blog/arm-converged-ai-data-center-aws-graviton5), Ranger is a very detailed set of promises. The smart play is to validate your Arm compatibility now, on hardware that already exists, so you are not scrambling when N4 instances go live in 2027 or 2028.