# AMD unveils Versal Premium Gen2 MoP adaptive SoC with on-package memory for AI workloads

> Source: <https://cryptobriefing.com/amd-versal-premium-gen2-mop-adaptive-soc-ai/>
> Published: 2026-07-01 01:11:53+00:00

# AMD unveils Versal Premium Gen2 MoP adaptive SoC with on-package memory for AI workloads

The new chip packs up to 32GB of LPDDR5X memory directly into the package, cutting board area by up to 60% for space-constrained AI and defense applications

AMD just made its adaptive computing play a lot more interesting. The company announced the Versal Premium Gen 2 Memory on Package (MoP) adaptive SoC, a chip that stuffs up to 32GB of LPDDR5X memory directly into the package itself, delivering bandwidth of up to 288GB/s.

In English: instead of scattering memory chips across a circuit board and wiring them to the processor, AMD is putting the memory right next to the logic. The result is a claimed 60% reduction in board area compared to traditional discrete memory designs.

## What AMD actually built

The Versal Premium Gen 2 MoP is not a standalone product launch so much as a new variant of a platform AMD first unveiled back in November 2024. The original Versal Premium Series Gen 2 established the architecture. This MoP version adds the on-package memory integration that turns it into a more self-contained computing unit.

The SoC supports industrial-grade operation from -40°C to 110°C. AMD is also promising over 15 years of lifecycle support, which matters enormously in sectors like aerospace and defense where swapping out hardware every few years isn’t exactly convenient.

On the connectivity front, the chip is the first adaptive SoC to integrate hard IP for PCIe Gen6 at 64 Gb/s and CXL 3.1. PCIe Gen6 doubles the bandwidth of Gen5, and CXL 3.1 enables more sophisticated memory pooling and sharing across devices.

Security features include PCIe IDE and integrated 400G crypto engines.

## The Memory on Package advantage

By integrating LPDDR5X directly into the package, AMD is delivering a 60% reduction in board area compared to traditional discrete memory designs. LPDDR5X was designed for mobile and automotive applications where power efficiency matters as much as raw speed. Packaging 32GB of it directly with an adaptive SoC gives designers access to substantial memory bandwidth without the power and area penalties of HBM.

AMD specifically noted that the 15-year lifecycle support helps avoid HBM refresh cycles. HBM generations turn over relatively quickly, and for a defense contractor building a radar system that needs to operate for decades, being locked into a memory technology with a short commercial lifespan is a genuine problem.

## Target markets and timeline

AMD is aiming the MoP variant at what it calls “physical AI” alongside networking, professional video, aerospace, defense, and test and measurement.

Sampling is expected to begin at the end of 2026, with production shipments planned for the second half of 2027. AMD has noted that existing non-MoP Versal Premium Gen 2 devices are already available, and developers can start building with AMD’s Vivado and Vitis tool chains today.

## What this means for investors

AMD’s adaptive computing division, which inherited Xilinx’s FPGA business after the $49B acquisition closed in 2022, has operated somewhat in the shadow of the company’s data center GPU story. The MoP announcement signals that AMD is investing meaningfully in differentiating its adaptive SoC lineup rather than letting it coast on the legacy Xilinx portfolio.

The competitive landscape includes Intel’s Altera, recently re-spun as an independent entity, and Lattice Semiconductor at the lower end.

Production shipments in the second half of 2027 means AMD needs to deliver on advanced packaging at scale. Investors should watch sampling milestones at the end of 2026 as the first real proof point that the MoP technology is progressing on schedule.

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