AMD launches Instinct MI400 Series GPUs for AI workloads

AMD launched the Instinct MI400 Series GPUs for AI workloads, including the MI455X for frontier AI and the MI430X for sovereign AI and HPC. Built on CDNA 5 architecture and a 2nm process, the MI455X features 432GB of HBM4 memory and 3.6 Tb/s scale-up bandwidth, while the MI430X delivers up to 288 TFLOPS FP64 performance. Vamsi Boppana, AMD senior vice president of AI, said the series extends AMD's AI portfolio with purpose-built solutions for diverse AI and HPC deployments.

AMD has officially launched its AMD Instinct MI400 Series GPU line. The company's MI455X GPUs are focused on training and inference for frontier AI deployments, while the MI430X GPU is targeted at sovereign AI and HPC workloads. "The next generation of AI will span frontier AI, sovereign AI, and scientific computing, and each requires infrastructure optimized for its unique demands," Vamsi Boppana, senior vice president, AI, AMD, said. "The AMD Instinct MI400 Series extends our AI portfolio with purpose-built solutions optimized for the full spectrum of AI and HPC deployments, built on an open software foundation that gives customers the flexibility to innovate at every scale.” The chips are built with the company's new CDNA 5 architecture and on a 2nm process node. The MI430X delivers up to 288 TFLOPS of hardware-based FP64 performance for scientific computing, the company said. Each MI455X GPU includes 432GB of HBM4 memory, a 1.5x increase over the 288GB of HBM3E in the MI355X, with around 2.9x the peak memory bandwidth. They include 3.6 terabits per second Tb/s of low-latency scale-up bandwidth across 36 links. The chip has two L2 Caches of 96MB, and 320 billion transistors. Up to 72 MI455X GPUs can be combined into one pod. Each chip is capable of 40.26 petaflops of peak MXP4 performance, AMD claims. Like its predecessor, the MI355X, the 455X features eight accelerator complex die XCD chiplets. The 32 Active Compute Units per XCD of the MI355X have been replaced by the same number of Work Group Processors WGPs in the MI455X. Each XCD is divided into two Shader Engines SEs with 16 WGPs each.