{"slug": "amd-confirms-epyc-venice-zen-6-cpus-launch-on-july-22-23-at-advancing-ai-event", "title": "AMD Confirms EPYC \"Venice\" Zen 6 CPUs Launch on July 22-23 at Advancing AI Event", "summary": "AMD CTO Mark Papermaster confirmed the EPYC \"Venice\" Zen 6 server CPU will launch at AMD's Advancing AI event on July 22-23. Built on TSMC's 2nm process, the chip offers up to 256 cores and over 70% performance improvement over its predecessor, targeting AI workloads with PCIe Gen 6 and new Instinct MI455 GPUs.", "body_md": "AMD CTO Mark Papermaster has confirmed that EPYC \"Venice,\" the company's first Zen 6 server CPU, will be officially introduced at AMD's Advancing AI event on July 22nd and 23rd. In a recent interview, Papermaster described the upcoming CPUs as optimized for traditional x86 enterprise workloads, noting that enterprise customers aren't moving away from x86. EPYC \"Venice\" is built on TSMC's 2 nm process, making it the first high-performance computing processor to reach production on that node. Currently, manufacturing is ramping in Taiwan, as [AMD announced back in May](https://www.techpowerup.com/349238/amd-announces-production-ramp-of-next-generation-amd-epyc-processor-venice-on-tsmc-2nm-process-technology), with future production planned at TSMC's Arizona facility. The flagship configuration goes up to 256 Zen 6 cores, a 33% jump over the current 192-core EPYC \"Turin\" lineup. AMD claims over 70% higher performance and efficiency compared to the Zen 5-based predecessor.\n\nOn the platform side, \"Venice\" moves to the new SP7 socket with 16-channel memory support delivering up to 1.6 TB/s of bandwidth, and adopts PCIe Gen 6 for improved CPU-to-GPU communication. This is mostly relevant for the AI accelerator workloads that the EPYC \"Venice\" Zen 6 CPUs are targeting alongside traditional x86 tasks. These CPUs when installed in [Helios racks](https://www.techpowerup.com/341893/amd-showcases-helios-rack-scale-platform), will be paired with new [AMD Instinct MI455](https://www.techpowerup.com/346482/amd-shoots-down-report-of-delayed-instinct-mi455x-accelerator-launch) GPUs. If you're wondering about the mainstream Zen 6 desktop and mobile chips, those are a separate story. Related to those, there's no shortage of rumors and leaks, whether we are talking about the confirmed [Ryzen Threadripper TR6 \"Mustang Peak\"](https://www.techpowerup.com/350081/amd-ryzen-threadripper-tr6-mustang-peak-arrives-with-zen-6-and-pcie-6-0), the Ryzen 10000 series \"[Olympic Ridge](https://www.techpowerup.com/350013/amd-ryzen-10000-series-olympic-ridge-could-trade-integrated-graphics-for-npu)\" or the \"[Medusa Point](https://www.techpowerup.com/350613/amd-10-core-medusa-point-zen-6-apu-reappears-in-geekbench-with-improved-performance)\" APUs. However, consumer parts aren't expected before the end of the year at the earliest, with CES 2027 in January being the most likely debut window.", "url": "https://wpnews.pro/news/amd-confirms-epyc-venice-zen-6-cpus-launch-on-july-22-23-at-advancing-ai-event", "canonical_source": "https://www.techpowerup.com/350648/amd-confirms-epyc-venice-zen-6-cpus-launch-on-july-22-23-at-advancing-ai-event", "published_at": "2026-07-09 20:00:28+00:00", "updated_at": "2026-07-09 20:13:42.482993+00:00", "lang": "en", "topics": ["ai-infrastructure", "ai-chips", "artificial-intelligence"], "entities": ["AMD", "Mark Papermaster", "EPYC Venice", "Zen 6", "TSMC", "Instinct MI455", "Helios"], "alternates": {"html": "https://wpnews.pro/news/amd-confirms-epyc-venice-zen-6-cpus-launch-on-july-22-23-at-advancing-ai-event", "markdown": "https://wpnews.pro/news/amd-confirms-epyc-venice-zen-6-cpus-launch-on-july-22-23-at-advancing-ai-event.md", "text": "https://wpnews.pro/news/amd-confirms-epyc-venice-zen-6-cpus-launch-on-july-22-23-at-advancing-ai-event.txt", "jsonld": "https://wpnews.pro/news/amd-confirms-epyc-venice-zen-6-cpus-launch-on-july-22-23-at-advancing-ai-event.jsonld"}}