{"slug": "aisin-and-tohoku-university-build-16nm-ai-chip-using-embedded-stt-mram-to-cut", "title": "Aisin and Tohoku University Build 16nm AI Chip Using Embedded STT-MRAM to Cut Inference Power", "summary": "Tohoku University and Aisin announced on November 2, 2026 a jointly developed AI chip that uses embedded STT-MRAM and near-memory computing to eliminate external DRAM and SSDs, cutting energy consumption to one-fiftieth, object detection inference time to one-tenth, and power-on-to-OS boot time by roughly 39 times versus conventional designs. The SoC is manufactured on TSMC's 16nm FinFET process and integrates a 32MB STT-MRAM array, an AI accelerator, two Arm Cortex-A53 CPU cores, and an Arm Mali-G31 GPU. Volume production timing, target vehicle models, wafer pricing and STT-MRAM yield economics on the 16nm baseline, and licensing beyond Aisin's automotive applications remain undisclosed.", "body_md": "East Asian Technology Intelligence\n\nTech news from Japan, China, Korea & Taiwan — translated, contextualized, and delivered for Western readers.\n\nFree. Unsubscribe anytime.\n\nThis story ran in [Issue #149](https://asiaai.fyi/mediatek-ai-asic-revenue-cloud-accelerators/), alongside three other stories.\n\nSemiconductors & Hardware\n\nWhat happened\n\nTohoku University and Aisin have developed an AI chip featuring embedded **STT-MRAM** that eliminates external DRAM and SSDs through **near-memory computing**. The architecture accelerates OS boot times by roughly 39 times, cuts object detection inference time to one-tenth, and reduces energy consumption to one-fiftieth compared to conventional designs. Manufactured on [TSMC](https://asiaai.fyi/companies/tsmc/)’s 16nm FinFET process, the SoC integrates a 32MB STT-MRAM array, an AI accelerator, two Arm Cortex-A53 CPU cores, and an Arm Mali-G31 GPU.\n\nKey details\n\n- Tohoku University and Aisin jointly developed a near-memory computing AI chip featuring embedded STT-MRAM on November 2, 2026.\n- The chip is manufactured using TSMC’s 16nm FinFET process and integrates a 32MB STT-MRAM block, an AI accelerator, two Arm Cortex-A53 cores, and an Arm Mali-G31 GPU.\n- The design reduces power-on to OS boot time by approximately 39 times, cuts object detection time to about one-tenth, and lowers energy consumption by a factor of 50.\n\nWhat remains unclear\n\n- Volume production schedule and target vehicle models for initial deployment\n- Wafer pricing and yield economics of integrating STT-MRAM into a 16nm FinFET baseline process\n- Plans for commercial licensing beyond Aisin’s proprietary automotive applications\n\nSource: MONOist (ITmedia) · source published November 6, 2026\n\nJapanese industrial firms are aggressively pursuing edge-AI architectures that bypass memory bandwidth bottlenecks without relying on power-hungry external DRAM. This development underscores how traditional automotive suppliers like Aisin are vertically integrating specialized silicon to meet the rigorous latency and thermal constraints of software-defined vehicles.\n\nFor the wider picture, see [Japan Semiconductor Ecosystem](https://asiaai.fyi/guides/japan-semiconductor-ecosystem/).\n\nOriginal source (Japanese)\n\n世界初「STT-MRAMを搭載した16nm AI SoC」が誕生 SDV推進に向けた動きも加速\n\nPublished November 6, 2026\n\nThis story appeared in [AsiaAI.FYI Issue #149](https://asiaai.fyi/mediatek-ai-asic-revenue-cloud-accelerators/).\n\n\t\tGet AsiaAI.FYI in your inbox —\n\t\t[subscribe free](https://asiaaifyi.beehiiv.com/subscribe).", "url": "https://wpnews.pro/news/aisin-and-tohoku-university-build-16nm-ai-chip-using-embedded-stt-mram-to-cut", "canonical_source": "https://asiaai.fyi/aisin-tohkoku-16nm-ai-chip-stt-mram/", "published_at": "2026-11-07 16:13:03+00:00", "updated_at": "2026-11-09 01:30:16.003042+00:00", "lang": "en", "topics": ["ai-chips", "ai-infrastructure", "machine-learning", "computer-vision"], "entities": ["Tohoku University", "Aisin", "TSMC", "Arm", "Cortex-A53", "Mali-G31", "STT-MRAM", "MONOist"], "also_reported_by": [], "alternates": {"html": "https://wpnews.pro/news/aisin-and-tohoku-university-build-16nm-ai-chip-using-embedded-stt-mram-to-cut", "markdown": "https://wpnews.pro/news/aisin-and-tohoku-university-build-16nm-ai-chip-using-embedded-stt-mram-to-cut.md", "text": "https://wpnews.pro/news/aisin-and-tohoku-university-build-16nm-ai-chip-using-embedded-stt-mram-to-cut.txt", "jsonld": "https://wpnews.pro/news/aisin-and-tohoku-university-build-16nm-ai-chip-using-embedded-stt-mram-to-cut.jsonld"}}